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[/] [aemb/] [branches/] [AEMB2_712/] [sim/] - Rev 41

Rev	Log message	Author	Age	Path
41	New EDK 3.2 compatible design with optional barrel-shifter and multiplier. Fixed various minor data hazard bugs. Code compatible with -O0/1/2/3/s generated code.	sybreon	6101d 23h	/aemb/branches/AEMB2_712/sim/
39	Made some changes to the interrupt control. In some cases, the interrupt logic waits forever and doesn't execute. Bug was discovered by M. Ettus.	sybreon	6112d 08h	/aemb/branches/AEMB2_712/sim/
38	Added interrupt support.	sybreon	6257d 08h	/aemb/branches/AEMB2_712/sim/
31	Removed byte acrobatics.	sybreon	6287d 11h	/aemb/branches/AEMB2_712/sim/
30	Minor updates as sw/c/aeMB_testbench.c got updated.	sybreon	6290d 12h	/aemb/branches/AEMB2_712/sim/
22	Added support for 8-bit and 16-bit data types.	sybreon	6292d 05h	/aemb/branches/AEMB2_712/sim/
19	Added initial unified memory core.	sybreon	6304d 14h	/aemb/branches/AEMB2_712/sim/
18	Moved testbench into /sim/verilog. Simulation cleanups.	sybreon	6305d 06h	/aemb/branches/AEMB2_712/sim/
15	Removed ROM file. Please generate it from the SW directory.	sybreon	6313d 13h	/aemb/branches/AEMB2_712/sim/
13	Fibonacci rom	sybreon	6313d 20h	/aemb/branches/AEMB2_712/sim/
2	initial import	sybreon	6339d 09h	/aemb/branches/AEMB2_712/sim/