OpenCores
URL https://opencores.org/ocsvn/aemb/aemb/trunk

Subversion Repositories aemb

[/] [aemb/] [branches/] [DEV_SYBREON/] - Rev 38

Rev

Go to most recent revision

Filtering Options

Clear current filter

Rev Log message Author Age Path
38 Added interrupt support. sybreon 6342d 09h /aemb/branches/DEV_SYBREON/
36 Removed asynchronous reset signal. sybreon 6355d 19h /aemb/branches/DEV_SYBREON/
35 Added async BRA/DLY signals for future clock, reset, and interrupt features. sybreon 6356d 15h /aemb/branches/DEV_SYBREON/
34 Corrected speed issues after rev 1.9 update. sybreon 6357d 05h /aemb/branches/DEV_SYBREON/
33 Fixed minor data hazard bug spotted by Matt Ettus. sybreon 6372d 12h /aemb/branches/DEV_SYBREON/
32 Modified compilation sequence. sybreon 6372d 12h /aemb/branches/DEV_SYBREON/
31 Removed byte acrobatics. sybreon 6372d 12h /aemb/branches/DEV_SYBREON/
30 Minor updates as sw/c/aeMB_testbench.c got updated. sybreon 6375d 12h /aemb/branches/DEV_SYBREON/
29 Added code documentation.
Added new tests that test floating point, modulo arithmetic and multiplication/division.		 sybreon 6375d 12h /aemb/branches/DEV_SYBREON/
28 Fixed simulation bug. sybreon 6375d 12h /aemb/branches/DEV_SYBREON/
27 Removed some unnecessary bubble control. sybreon 6375d 23h /aemb/branches/DEV_SYBREON/
26 Fixed minor synthesis bug. sybreon 6375d 23h /aemb/branches/DEV_SYBREON/
25 Added code documentation.
Improved size & speed of rtl/verilog/aeMB_aslu.v		 sybreon 6376d 03h /aemb/branches/DEV_SYBREON/
24 Made minor performance optimisations. sybreon 6376d 13h /aemb/branches/DEV_SYBREON/
23 Fixed minor simulation bug. sybreon 6377d 05h /aemb/branches/DEV_SYBREON/
22 Added support for 8-bit and 16-bit data types. sybreon 6377d 05h /aemb/branches/DEV_SYBREON/
21 Added hierarchy block diagram. sybreon 6387d 11h /aemb/branches/DEV_SYBREON/
20 Added basic documentation doc/aeMB_datasheet.pdf sybreon 6388d 01h /aemb/branches/DEV_SYBREON/
19 Added initial unified memory core. sybreon 6389d 15h /aemb/branches/DEV_SYBREON/
18 Moved testbench into /sim/verilog.
Simulation cleanups.		 sybreon 6390d 07h /aemb/branches/DEV_SYBREON/

1 2 Next >

Show All

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.