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Rev Log message Author Age Path
68 Generate VMEM instead of HEX dumps of programme. sybreon 6074d 08h /aemb/branches/DEV_SYBREON/
67 Minor simulation fixes. sybreon 6076d 07h /aemb/branches/DEV_SYBREON/
66 Added fsl_tag_o to FSL bus (tag either address or data). sybreon 6078d 05h /aemb/branches/DEV_SYBREON/
65 Fixed minor typo causing synthesis failure. sybreon 6079d 17h /aemb/branches/DEV_SYBREON/
64 Fixed minor interrupt test typo. sybreon 6080d 03h /aemb/branches/DEV_SYBREON/
63 Fixed interrupt signal synchronisation. sybreon 6080d 03h /aemb/branches/DEV_SYBREON/
62 Fixed minor typo. sybreon 6080d 03h /aemb/branches/DEV_SYBREON/
61 Changed interrupt handling system (reported by M. Ettus). sybreon 6080d 05h /aemb/branches/DEV_SYBREON/
60 Added interrupt test routine. sybreon 6080d 05h /aemb/branches/DEV_SYBREON/
59 Added posedge/negedge bus interface.
Modified interrupt test system.		 sybreon 6080d 05h /aemb/branches/DEV_SYBREON/
58 Updated simulation to also check BRI 0x00 instruction. sybreon 6081d 03h /aemb/branches/DEV_SYBREON/
57 Updated documentation to EDK32 version. sybreon 6083d 04h /aemb/branches/DEV_SYBREON/
56 Parameterised optional components into aeMB_xecu.v sybreon 6084d 03h /aemb/branches/DEV_SYBREON/
55 Upgraded license to LGPLv3.
Significant performance optimisations.		 sybreon 6084d 10h /aemb/branches/DEV_SYBREON/
54 Added some compilation optimisations. sybreon 6085d 06h /aemb/branches/DEV_SYBREON/
53 Added GET/PUT support through a FSL bus. sybreon 6085d 06h /aemb/branches/DEV_SYBREON/
52 Added log output to iverilog.log sybreon 6085d 06h /aemb/branches/DEV_SYBREON/
51 Fixed data WISHBONE arbitration problem (reported by J Lee). sybreon 6086d 09h /aemb/branches/DEV_SYBREON/
50 Parameterised optional components. sybreon 6086d 12h /aemb/branches/DEV_SYBREON/
49 Added random seed for simulation. sybreon 6089d 16h /aemb/branches/DEV_SYBREON/

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