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[/] [aemb/] [tags/] [AEMB_7_05/] [sim/] - Rev 19

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Rev Log message Author Age Path
19 Added initial unified memory core. sybreon 6322d 17h /aemb/tags/AEMB_7_05/sim/
18 Moved testbench into /sim/verilog.
Simulation cleanups.
sybreon 6323d 10h /aemb/tags/AEMB_7_05/sim/
15 Removed ROM file. Please generate it from the SW directory. sybreon 6331d 16h /aemb/tags/AEMB_7_05/sim/
13 Fibonacci rom sybreon 6332d 00h /aemb/tags/AEMB_7_05/sim/
2 initial import sybreon 6357d 13h /aemb/tags/AEMB_7_05/sim/

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