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[/] [aemb/] [tags/] [AEMB_7_05/] [sim/] - Rev 206

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Rev Log message Author Age Path
191 New directory structure. root 5586d 18h /aemb/tags/AEMB_7_05/sim/
37 This commit was manufactured by cvs2svn to create tag 'AEMB_7_05'. 6249d 03h /aemb/tags/AEMB_7_05/sim/
31 Removed byte acrobatics. sybreon 6265d 20h /aemb/tags/AEMB_7_05/sim/
30 Minor updates as sw/c/aeMB_testbench.c got updated. sybreon 6268d 21h /aemb/tags/AEMB_7_05/sim/
22 Added support for 8-bit and 16-bit data types. sybreon 6270d 14h /aemb/tags/AEMB_7_05/sim/
19 Added initial unified memory core. sybreon 6282d 23h /aemb/tags/AEMB_7_05/sim/
18 Moved testbench into /sim/verilog.
Simulation cleanups.		 sybreon 6283d 16h /aemb/tags/AEMB_7_05/sim/
15 Removed ROM file. Please generate it from the SW directory. sybreon 6291d 22h /aemb/tags/AEMB_7_05/sim/
13 Fibonacci rom sybreon 6292d 06h /aemb/tags/AEMB_7_05/sim/
2 initial import sybreon 6317d 19h /aemb/tags/AEMB_7_05/sim/

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