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Rev Log message Author Age Path
32 Modified compilation sequence. sybreon 6299d 14h /aemb/trunk/
31 Removed byte acrobatics. sybreon 6299d 14h /aemb/trunk/
30 Minor updates as sw/c/aeMB_testbench.c got updated. sybreon 6302d 15h /aemb/trunk/
29 Added code documentation.
Added new tests that test floating point, modulo arithmetic and multiplication/division.
sybreon 6302d 15h /aemb/trunk/
28 Fixed simulation bug. sybreon 6302d 15h /aemb/trunk/
27 Removed some unnecessary bubble control. sybreon 6303d 02h /aemb/trunk/
26 Fixed minor synthesis bug. sybreon 6303d 02h /aemb/trunk/
25 Added code documentation.
Improved size & speed of rtl/verilog/aeMB_aslu.v
sybreon 6303d 06h /aemb/trunk/
24 Made minor performance optimisations. sybreon 6303d 16h /aemb/trunk/
23 Fixed minor simulation bug. sybreon 6304d 08h /aemb/trunk/
22 Added support for 8-bit and 16-bit data types. sybreon 6304d 08h /aemb/trunk/
21 Added hierarchy block diagram. sybreon 6314d 14h /aemb/trunk/
20 Added basic documentation doc/aeMB_datasheet.pdf sybreon 6315d 04h /aemb/trunk/
19 Added initial unified memory core. sybreon 6316d 17h /aemb/trunk/
18 Moved testbench into /sim/verilog.
Simulation cleanups.
sybreon 6317d 10h /aemb/trunk/
17 Cosmetic changes sybreon 6318d 14h /aemb/trunk/
16 Added pipeline stalling from incomplete bus cycles.
Separated sync and async portions of code.
sybreon 6319d 02h /aemb/trunk/
15 Removed ROM file. Please generate it from the SW directory. sybreon 6325d 16h /aemb/trunk/
14 Added initial interrupt/exception support. sybreon 6325d 16h /aemb/trunk/
13 Fibonacci rom sybreon 6326d 00h /aemb/trunk/

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