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Rev Log message Author Age Path
59 Added posedge/negedge bus interface.
Modified interrupt test system.		 sybreon 6148d 09h /aemb/trunk/
58 Updated simulation to also check BRI 0x00 instruction. sybreon 6149d 07h /aemb/trunk/
57 Updated documentation to EDK32 version. sybreon 6151d 09h /aemb/trunk/
56 Parameterised optional components into aeMB_xecu.v sybreon 6152d 07h /aemb/trunk/
55 Upgraded license to LGPLv3.
Significant performance optimisations.		 sybreon 6152d 14h /aemb/trunk/
54 Added some compilation optimisations. sybreon 6153d 10h /aemb/trunk/
53 Added GET/PUT support through a FSL bus. sybreon 6153d 10h /aemb/trunk/
52 Added log output to iverilog.log sybreon 6153d 10h /aemb/trunk/
51 Fixed data WISHBONE arbitration problem (reported by J Lee). sybreon 6154d 13h /aemb/trunk/
50 Parameterised optional components. sybreon 6154d 17h /aemb/trunk/
49 Added random seed for simulation. sybreon 6157d 20h /aemb/trunk/
48 Fixed spurious interrupt latching during long bus cycles (spotted by J Lee). sybreon 6159d 02h /aemb/trunk/
47 Added -msoft-float and -mxl-soft-div compiler flags. sybreon 6159d 02h /aemb/trunk/
46 Minor code cleanup. sybreon 6159d 22h /aemb/trunk/
45 Minor code cleanup. sybreon 6159d 22h /aemb/trunk/
44 Added better (beta) interrupt support.
Changed MSR_IE to disabled at reset as per MB docs.		 sybreon 6160d 12h /aemb/trunk/
43 Added interrupt simulation.
Changed "human readable" simulation output.		 sybreon 6160d 12h /aemb/trunk/
42 Enable MSR_IE with software. sybreon 6160d 12h /aemb/trunk/
41 New EDK 3.2 compatible design with optional barrel-shifter and multiplier.
Fixed various minor data hazard bugs.
Code compatible with -O0/1/2/3/s generated code.		 sybreon 6161d 04h /aemb/trunk/
40 Recommended to compile code with -O2/3/s sybreon 6171d 12h /aemb/trunk/

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