OpenCores
URL https://opencores.org/ocsvn/aemb/aemb/trunk

Subversion Repositories aemb

[/] [aemb/] [trunk/] - Rev 65

Rev

Go to most recent revision

Filtering Options

Clear current filter

Rev Log message Author Age Path
65 Fixed minor typo causing synthesis failure. sybreon 6114d 19h /aemb/trunk/
64 Fixed minor interrupt test typo. sybreon 6115d 05h /aemb/trunk/
63 Fixed interrupt signal synchronisation. sybreon 6115d 05h /aemb/trunk/
62 Fixed minor typo. sybreon 6115d 05h /aemb/trunk/
61 Changed interrupt handling system (reported by M. Ettus). sybreon 6115d 06h /aemb/trunk/
60 Added interrupt test routine. sybreon 6115d 06h /aemb/trunk/
59 Added posedge/negedge bus interface.
Modified interrupt test system.
sybreon 6115d 06h /aemb/trunk/
58 Updated simulation to also check BRI 0x00 instruction. sybreon 6116d 05h /aemb/trunk/
57 Updated documentation to EDK32 version. sybreon 6118d 06h /aemb/trunk/
56 Parameterised optional components into aeMB_xecu.v sybreon 6119d 04h /aemb/trunk/
55 Upgraded license to LGPLv3.
Significant performance optimisations.
sybreon 6119d 12h /aemb/trunk/
54 Added some compilation optimisations. sybreon 6120d 08h /aemb/trunk/
53 Added GET/PUT support through a FSL bus. sybreon 6120d 08h /aemb/trunk/
52 Added log output to iverilog.log sybreon 6120d 08h /aemb/trunk/
51 Fixed data WISHBONE arbitration problem (reported by J Lee). sybreon 6121d 11h /aemb/trunk/
50 Parameterised optional components. sybreon 6121d 14h /aemb/trunk/
49 Added random seed for simulation. sybreon 6124d 18h /aemb/trunk/
48 Fixed spurious interrupt latching during long bus cycles (spotted by J Lee). sybreon 6125d 23h /aemb/trunk/
47 Added -msoft-float and -mxl-soft-div compiler flags. sybreon 6125d 23h /aemb/trunk/
46 Minor code cleanup. sybreon 6126d 20h /aemb/trunk/

1 2 Next >

Show All

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.