OpenCores
URL https://opencores.org/ocsvn/aemb/aemb/trunk

Subversion Repositories aemb

[/] [aemb/] [trunk/] [rtl/] - Rev 150

Rev

Go to most recent revision

Filtering Options

Clear current filter

Rev Log message Author Age Path
150 Optimisations. sybreon 5920d 05h /aemb/trunk/rtl/
149 Minor performance optimisation. sybreon 5920d 12h /aemb/trunk/rtl/
148 added iwb_tag_o signal tied to MSR_ICE. sybreon 5920d 17h /aemb/trunk/rtl/
147 Disconnect from pipeline. sybreon 5920d 20h /aemb/trunk/rtl/
140 Fixed minor typos. sybreon 5920d 21h /aemb/trunk/rtl/
134 Minor performance improvements. sybreon 5921d 19h /aemb/trunk/rtl/
132 Fixed minor typos. sybreon 5922d 12h /aemb/trunk/rtl/
131 Passes basic tests. Minor documentation changes to make it compatible with iverilog pre-processor. sybreon 5922d 12h /aemb/trunk/rtl/
127 Fixed pipelined latching of data bug. sybreon 5924d 23h /aemb/trunk/rtl/
126 Fixed CMP bug. sybreon 5924d 23h /aemb/trunk/rtl/
125 Passes arithmetic tests with single thread. sybreon 5927d 01h /aemb/trunk/rtl/
124 FASM removed. sybreon 5927d 01h /aemb/trunk/rtl/
120 Basic version with some features left out. sybreon 5927d 20h /aemb/trunk/rtl/
119 Initial import. sybreon 5927d 20h /aemb/trunk/rtl/
118 Initial import. sybreon 5930d 13h /aemb/trunk/rtl/
114 changed MSR bits sybreon 5936d 21h /aemb/trunk/rtl/
105 Patch interrupt bug. sybreon 6018d 12h /aemb/trunk/rtl/
103 Patched problem where memory access followed by dual cycle instructions were not stalling correctly (submitted by M. Ettus) sybreon 6019d 21h /aemb/trunk/rtl/
102 Fix MTS during interrupt vectoring bug (reported by M. Ettus). sybreon 6019d 21h /aemb/trunk/rtl/
101 Made multiplier pause with pipeline sybreon 6029d 18h /aemb/trunk/rtl/

1 2 Next >

Show All

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.