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[/] [aemb/] [trunk/] [rtl/] [verilog/] - Rev 105

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Rev	Log message	Author	Age	Path
105	Patch interrupt bug.	sybreon	6043d 07h	/aemb/trunk/rtl/verilog/
103	Patched problem where memory access followed by dual cycle instructions were not stalling correctly (submitted by M. Ettus)	sybreon	6044d 16h	/aemb/trunk/rtl/verilog/
102	Fix MTS during interrupt vectoring bug (reported by M. Ettus).	sybreon	6044d 16h	/aemb/trunk/rtl/verilog/
101	Made multiplier pause with pipeline	sybreon	6054d 12h	/aemb/trunk/rtl/verilog/
100	multiplier issues	sybreon	6054d 12h	/aemb/trunk/rtl/verilog/
99	Minor cleanup	sybreon	6066d 07h	/aemb/trunk/rtl/verilog/
96	Stalls pipeline on MUL/BSF instructions results in minor speed improvements.	sybreon	6069d 09h	/aemb/trunk/rtl/verilog/
95	Abstracted simulation kernel (aeMB_sim) to split simulation models from synthesis models.	sybreon	6071d 11h	/aemb/trunk/rtl/verilog/
94	Prevent fHZD & rBRA[1]	sybreon	6073d 09h	/aemb/trunk/rtl/verilog/
93	Minor enable fix	sybreon	6073d 09h	/aemb/trunk/rtl/verilog/
92	Partitioned simulation model.	sybreon	6076d 13h	/aemb/trunk/rtl/verilog/
91	Made idle thread PC track main PC.	sybreon	6077d 19h	/aemb/trunk/rtl/verilog/
90	Fixed Carry bit bug.	sybreon	6077d 19h	/aemb/trunk/rtl/verilog/
89	Changed simulation kernel.	sybreon	6077d 19h	/aemb/trunk/rtl/verilog/
88	Minor optimisations.	sybreon	6078d 11h	/aemb/trunk/rtl/verilog/
86	Some optimisations.	sybreon	6079d 04h	/aemb/trunk/rtl/verilog/
85	Replaced OF/ID blocks with combined block.	sybreon	6079d 04h	/aemb/trunk/rtl/verilog/
84	Added interrupt support.	sybreon	6079d 04h	/aemb/trunk/rtl/verilog/
83	Combined ID/OF blocks.	sybreon	6079d 04h	/aemb/trunk/rtl/verilog/
82	Further optimisations (speed + size).	sybreon	6081d 10h	/aemb/trunk/rtl/verilog/

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[/] [aemb/] [trunk/] [rtl/] [verilog/] - Rev 105

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