URL https://opencores.org/ocsvn/aemb/aemb/trunk

Subversion Repositories aemb

[/] [aemb/] [trunk/] [rtl/] [verilog/] - Rev 198

Rev	Log message	Author	Age	Path
191	New directory structure.	root	5589d 02h	/aemb/trunk/rtl/verilog/
190	Housekeeping.	sybreon	5603d 12h	/aemb/trunk/rtl/verilog/
189	* empty log message *	sybreon	5811d 11h	/aemb/trunk/rtl/verilog/
188	* empty log message *	sybreon	5811d 12h	/aemb/trunk/rtl/verilog/
187	nc	sybreon	5825d 23h	/aemb/trunk/rtl/verilog/
186	added tool specific conditional defines.	sybreon	5825d 23h	/aemb/trunk/rtl/verilog/
172	single thread design	sybreon	5865d 11h	/aemb/trunk/rtl/verilog/
171	* empty log message *	sybreon	5865d 23h	/aemb/trunk/rtl/verilog/
170	initial	sybreon	5865d 23h	/aemb/trunk/rtl/verilog/
169	* empty log message *	sybreon	5865d 23h	/aemb/trunk/rtl/verilog/
168	* empty log message *	sybreon	5866d 00h	/aemb/trunk/rtl/verilog/
167	* empty log message *	sybreon	5866d 00h	/aemb/trunk/rtl/verilog/
166	final upload	sybreon	5866d 00h	/aemb/trunk/rtl/verilog/
160	minor typo.	sybreon	5891d 07h	/aemb/trunk/rtl/verilog/
159	Backported Adder from AEMB2_EDK62. Fixes 64-bit math problem reported by M. Ettus.	sybreon	5891d 07h	/aemb/trunk/rtl/verilog/
158	Got rid of the Greater-Than comparator. Other minor size optimisations.	sybreon	5901d 09h	/aemb/trunk/rtl/verilog/
157	Added interrupt capability.	sybreon	5901d 12h	/aemb/trunk/rtl/verilog/
150	Optimisations.	sybreon	5904d 12h	/aemb/trunk/rtl/verilog/
149	Minor performance optimisation.	sybreon	5904d 20h	/aemb/trunk/rtl/verilog/
148	added iwb_tag_o signal tied to MSR_ICE.	sybreon	5905d 01h	/aemb/trunk/rtl/verilog/