URL https://opencores.org/ocsvn/aemb/aemb/trunk

Subversion Repositories aemb

[/] [aemb/] [trunk/] [rtl/] [verilog/] - Rev 203

Rev	Log message	Author	Age	Path
203	optimised exception signals.	sybreon	5457d 05h	/aemb/trunk/rtl/verilog/
202	added basic exception signals.	sybreon	5457d 05h	/aemb/trunk/rtl/verilog/
191	New directory structure.	root	5587d 08h	/aemb/trunk/rtl/verilog/
190	Housekeeping.	sybreon	5601d 18h	/aemb/trunk/rtl/verilog/
189	* empty log message *	sybreon	5809d 17h	/aemb/trunk/rtl/verilog/
188	* empty log message *	sybreon	5809d 18h	/aemb/trunk/rtl/verilog/
187	nc	sybreon	5824d 05h	/aemb/trunk/rtl/verilog/
186	added tool specific conditional defines.	sybreon	5824d 05h	/aemb/trunk/rtl/verilog/
172	single thread design	sybreon	5863d 17h	/aemb/trunk/rtl/verilog/
171	* empty log message *	sybreon	5864d 05h	/aemb/trunk/rtl/verilog/
170	initial	sybreon	5864d 05h	/aemb/trunk/rtl/verilog/
169	* empty log message *	sybreon	5864d 05h	/aemb/trunk/rtl/verilog/
168	* empty log message *	sybreon	5864d 05h	/aemb/trunk/rtl/verilog/
167	* empty log message *	sybreon	5864d 06h	/aemb/trunk/rtl/verilog/
166	final upload	sybreon	5864d 06h	/aemb/trunk/rtl/verilog/
160	minor typo.	sybreon	5889d 13h	/aemb/trunk/rtl/verilog/
159	Backported Adder from AEMB2_EDK62. Fixes 64-bit math problem reported by M. Ettus.	sybreon	5889d 13h	/aemb/trunk/rtl/verilog/
158	Got rid of the Greater-Than comparator. Other minor size optimisations.	sybreon	5899d 14h	/aemb/trunk/rtl/verilog/
157	Added interrupt capability.	sybreon	5899d 18h	/aemb/trunk/rtl/verilog/
150	Optimisations.	sybreon	5902d 18h	/aemb/trunk/rtl/verilog/