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[/] [aemb/] [trunk/] [sim/] - Rev 143

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Rev Log message Author Age Path
143 Fixed minor typos. sybreon 5924d 21h /aemb/trunk/sim/
138 initial import sybreon 5925d 19h /aemb/trunk/sim/
98 Minor typo sybreon 6045d 16h /aemb/trunk/sim/
95 Abstracted simulation kernel (aeMB_sim) to split simulation models from synthesis models. sybreon 6050d 17h /aemb/trunk/sim/
92 Partitioned simulation model. sybreon 6055d 19h /aemb/trunk/sim/
79 Modified for AEMB2 sybreon 6063d 13h /aemb/trunk/sim/
73 Moved simulation kernel into code. sybreon 6073d 20h /aemb/trunk/sim/
71 Old version deprecated. sybreon 6080d 23h /aemb/trunk/sim/
69 Removed unnecessary byte acrobatics with VMEM data. sybreon 6083d 19h /aemb/trunk/sim/
67 Minor simulation fixes. sybreon 6085d 18h /aemb/trunk/sim/
59 Added posedge/negedge bus interface.
Modified interrupt test system.		 sybreon 6089d 15h /aemb/trunk/sim/
58 Updated simulation to also check BRI 0x00 instruction. sybreon 6090d 14h /aemb/trunk/sim/
53 Added GET/PUT support through a FSL bus. sybreon 6094d 17h /aemb/trunk/sim/
52 Added log output to iverilog.log sybreon 6094d 17h /aemb/trunk/sim/
50 Parameterised optional components. sybreon 6095d 23h /aemb/trunk/sim/
49 Added random seed for simulation. sybreon 6099d 02h /aemb/trunk/sim/
43 Added interrupt simulation.
Changed "human readable" simulation output.		 sybreon 6101d 18h /aemb/trunk/sim/
41 New EDK 3.2 compatible design with optional barrel-shifter and multiplier.
Fixed various minor data hazard bugs.
Code compatible with -O0/1/2/3/s generated code.		 sybreon 6102d 10h /aemb/trunk/sim/
39 Made some changes to the interrupt control. In some cases, the interrupt logic waits forever and doesn't execute. Bug was discovered by M. Ettus. sybreon 6112d 18h /aemb/trunk/sim/
38 Added interrupt support. sybreon 6257d 19h /aemb/trunk/sim/

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