URL https://opencores.org/ocsvn/aemb/aemb/trunk

Subversion Repositories aemb

[/] [aemb/] [trunk/] [sim/] - Rev 39

Rev	Log message	Author	Age	Path
39	Made some changes to the interrupt control. In some cases, the interrupt logic waits forever and doesn't execute. Bug was discovered by M. Ettus.	sybreon	6175d 15h	/aemb/trunk/sim/
38	Added interrupt support.	sybreon	6320d 15h	/aemb/trunk/sim/
31	Removed byte acrobatics.	sybreon	6350d 18h	/aemb/trunk/sim/
30	Minor updates as sw/c/aeMB_testbench.c got updated.	sybreon	6353d 19h	/aemb/trunk/sim/
22	Added support for 8-bit and 16-bit data types.	sybreon	6355d 12h	/aemb/trunk/sim/
19	Added initial unified memory core.	sybreon	6367d 21h	/aemb/trunk/sim/
18	Moved testbench into /sim/verilog. Simulation cleanups.	sybreon	6368d 14h	/aemb/trunk/sim/
15	Removed ROM file. Please generate it from the SW directory.	sybreon	6376d 20h	/aemb/trunk/sim/
13	Fibonacci rom	sybreon	6377d 04h	/aemb/trunk/sim/
2	initial import	sybreon	6402d 17h	/aemb/trunk/sim/