URL https://opencores.org/ocsvn/aemb/aemb/trunk

Subversion Repositories aemb

[/] [aemb/] [trunk/] [sw/] [cc/] - Rev 145

Rev	Log message	Author	Age	Path
145	License change to GPL3.	sybreon	5906d 22h	/aemb/trunk/sw/cc/
141	Minor cosmetic changes.	sybreon	5906d 22h	/aemb/trunk/sw/cc/
139	Made headers C compatible.	sybreon	5907d 19h	/aemb/trunk/sw/cc/
137	Minor cosmetic changes.	sybreon	5907d 20h	/aemb/trunk/sw/cc/
136	Made single-thread compatible.	sybreon	5907d 20h	/aemb/trunk/sw/cc/
135	Updated software to freeze T0 and run T1.	sybreon	5907d 20h	/aemb/trunk/sw/cc/
130	switched printf's to iprintf's because iprintf's don't work by -O3 for some reason.	sybreon	5908d 14h	/aemb/trunk/sw/cc/
128	Fixed minor bugs. Initial use of hardware mutex.	sybreon	5911d 00h	/aemb/trunk/sw/cc/
125	Passes arithmetic tests with single thread.	sybreon	5913d 02h	/aemb/trunk/sw/cc/
123	compiler is not happy with floats in HEX.	sybreon	5913d 02h	/aemb/trunk/sw/cc/
122	converted float representations to hex	sybreon	5913d 03h	/aemb/trunk/sw/cc/
121	Added C/C++ compatible #ifdef statements	sybreon	5913d 22h	/aemb/trunk/sw/cc/
117	added a rendezvous function	sybreon	5922d 00h	/aemb/trunk/sw/cc/
116	Added malloc() lock and unlock routines	sybreon	5922d 01h	/aemb/trunk/sw/cc/
114	changed MSR bits	sybreon	5922d 23h	/aemb/trunk/sw/cc/
113	initial checkin	sybreon	5922d 23h	/aemb/trunk/sw/cc/
112	* empty log message *	sybreon	5922d 23h	/aemb/trunk/sw/cc/
111	added static assert hack	sybreon	5922d 23h	/aemb/trunk/sw/cc/
110	added cache controls	sybreon	5923d 02h	/aemb/trunk/sw/cc/
109	added interrupt controls (may need to be factorised out)	sybreon	5923d 03h	/aemb/trunk/sw/cc/