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[/] [amber/] - Rev 33

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Rev Log message Author Age Path
33 Fixed bug in div assembly function. Handles negative numbers correctly.
Fixed bug in printf function, negative numbers now print correctly.
csantifort 4835d 21h /amber/
32 Added clock cycle counting register to test_module to support dhrystone performance measurement csantifort 4836d 21h /amber/
31 Added dhrystone benchmark test csantifort 4836d 21h /amber/
30 Bug fix - a write access was sometimes dropped when it was in a sequence of writes with variable wb_ack delays csantifort 4850d 03h /amber/
29 Use lgo command for saving waveforms in modelsim csantifort 4851d 21h /amber/
28 Moved function prototypes to .h file csantifort 4851d 22h /amber/
27 Got working with cadence nc simulator csantifort 4885d 04h /amber/
26 Added wish list csantifort 4890d 05h /amber/
25 Bug fix: boot-loader.mem became larger that the allowed 8k byte boot mem size.
Removed a struct in elfsplitter.c thats only used for debug - this reduced boot-loader.mem enough so that it fits again.
Tidy up: Removed a debug message from hw/tools/run.sh
csantifort 4892d 02h /amber/
24 Added instructions how to build Linux kernel from source files csantifort 4894d 02h /amber/
23 Split the source files list into a Vertex-6 only list and a Spartan-6 only list.
That way users don;t need to delete files from the list manually if they only have
a setup for one of the FPGA types.
csantifort 4894d 03h /amber/
22 Added files and instructions to enable the building of the vmlinux image from the kernel source files. csantifort 4898d 02h /amber/
21 Fixed bug in the conditions to create the FPGA configuration log file. I added the creation of the log file in the last release, but the way it was implemented was causing the Makefile to always rebuild from the start. csantifort 4898d 02h /amber/
20 Added feature to A25 core to directly use a read value from the write back stage
to reduce the stall to 1 cycle when there is a register conflict with the
following instruction. This increases performance by about 3%.
csantifort 4919d 03h /amber/
19 Create a configuration log file as part of the synthesis flow. This file is a useful reference to
tell the different bitfiles apart.
csantifort 4919d 03h /amber/
18 Added list of source files and diagram for Amber25 core. csantifort 4922d 02h /amber/
17 amber25 core bug fix. The return address for irq interrupts was off by 4 bytes
when the interrupt occurred during a stm instruction with the following instruction
having some register conflicts. Added test irq_stm to catch the bug.
Cleaned up some header descriptions
csantifort 4923d 01h /amber/
16 Deleted the old version of the 3-state amber core. Its replaced with amber23.
Added the 5-state Amber core.
csantifort 4925d 15h /amber/
15 Copied amber to amber23, Many system changes to support new amber25 core. csantifort 4925d 16h /amber/
14 Re-wrote the behavioral clock generation code to more accurately
calculate the sys_clk frequency. The previous version was not
producing the correct frequency at higher frequenies due to
rounding errors.
csantifort 4927d 04h /amber/

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