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[/] [amber/] [trunk/] [hw/] - Rev 15

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Rev Log message Author Age Path
15 Copied amber to amber23, Many system changes to support new amber25 core. csantifort 4851d 15h /amber/trunk/hw/
14 Re-wrote the behavioral clock generation code to more accurately
calculate the sys_clk frequency. The previous version was not
producing the correct frequency at higher frequenies due to
rounding errors.		 csantifort 4853d 03h /amber/trunk/hw/
13 Bug fix - added an extra state to the rx state machine to properly align
reading the uart input to the middle of each bit.		 csantifort 4853d 03h /amber/trunk/hw/
12 Added INITIALIZE_TO_ZERO parameter to keep instantiation
idendical to generic sram models. The parameter is not used
in the Xilinx models (they always init to zero) but it used
in the generic models.		 csantifort 4853d 03h /amber/trunk/hw/
11 Added vmlinux test. csantifort 4868d 03h /amber/trunk/hw/
10 Removed parameters for unused peruipheral modules csantifort 4869d 07h /amber/trunk/hw/
9 Change the format of mcr and mrc listings so they exactly match the dissasembly produced by the gnu tools.
Write ip instead of r12 in listings.		 csantifort 4869d 07h /amber/trunk/hw/
8 Change the value in the ID register to be compatible with the Linux code that parses it and picks a processor type. csantifort 4869d 07h /amber/trunk/hw/
7 Added instructions to use Veritak simulator.
Removed some unused functions from memory_configuration.v.		 csantifort 4877d 21h /amber/trunk/hw/
6 Set ignore property for output files csantifort 4881d 00h /amber/trunk/hw/
5 Deleted two temporary files that should not be in the release. csantifort 4881d 21h /amber/trunk/hw/
2 Baseline release of the Amber 2 core csantifort 4882d 01h /amber/trunk/hw/

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