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[/] [amber/] [trunk/] [hw/] [fpga/] [bin/] - Rev 86

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Rev Log message Author Age Path
86 Fixed bug in amber 25 where a read was taken from user mode register in subervisor mode immediately following a ldm to user mode registers csantifort 3514d 06h /amber/trunk/hw/fpga/bin/
82 Fixed overflag bug, ldmia user regs bug and status_bits_mode set on non-ececuting command bug csantifort 3528d 02h /amber/trunk/hw/fpga/bin/
81 Make the tcp functionality more like a normal sockets implementation. csantifort 4192d 04h /amber/trunk/hw/fpga/bin/
78 Added a serial debug port (using UART0) to boot-loader-ethmac csantifort 4206d 13h /amber/trunk/hw/fpga/bin/
77 Added new a23 source files to sim and synthesis source lists. csantifort 4208d 09h /amber/trunk/hw/fpga/bin/
75 Fixed scripts after renaming boot-loader to boot-loader-serial csantifort 4214d 07h /amber/trunk/hw/fpga/bin/
64 Support latest Xilinx ISE 14.5 software. csantifort 4214d 10h /amber/trunk/hw/fpga/bin/
63 Add support for Xilinx ISim Verilog simulator.
Remove Virtex-6 files.		 csantifort 4214d 14h /amber/trunk/hw/fpga/bin/
61 Add new netowkr based boot loader.
Remove support for Virtex. Spartan 6 only now.		 csantifort 4501d 09h /amber/trunk/hw/fpga/bin/
43 Added support for the flat executable file format to vmlinux, so that the hello-world program is correctly relocated when it is loaded at the end of the vmlinux test.
Changed the Virtex-5 clock configuration to use a 1200MHz VCO frequency and 80MHz system clock frequency.		 csantifort 4894d 05h /amber/trunk/hw/fpga/bin/
36 Changed boot_mem for the a25 system to be 128 bits wide to match the 128-bit wide wishbone bus csantifort 4921d 02h /amber/trunk/hw/fpga/bin/
35 Amber25 improvements:
Use 128-bit wishbone bus, instead of 32-bit to reduce cache miss fetch times
Use a fast barrel shifter for shifts between 0 and 4 to improve timing
Use a 2 cycle full barrel shifter for complex shifts		 csantifort 4922d 10h /amber/trunk/hw/fpga/bin/
23 Split the source files list into a Vertex-6 only list and a Spartan-6 only list.
That way users don;t need to delete files from the list manually if they only have
a setup for one of the FPGA types.		 csantifort 4982d 10h /amber/trunk/hw/fpga/bin/
21 Fixed bug in the conditions to create the FPGA configuration log file. I added the creation of the log file in the last release, but the way it was implemented was causing the Makefile to always rebuild from the start. csantifort 4986d 09h /amber/trunk/hw/fpga/bin/
19 Create a configuration log file as part of the synthesis flow. This file is a useful reference to
tell the different bitfiles apart.		 csantifort 5007d 10h /amber/trunk/hw/fpga/bin/
15 Copied amber to amber23, Many system changes to support new amber25 core. csantifort 5013d 22h /amber/trunk/hw/fpga/bin/
11 Added vmlinux test. csantifort 5030d 10h /amber/trunk/hw/fpga/bin/
2 Baseline release of the Amber 2 core csantifort 5044d 08h /amber/trunk/hw/fpga/bin/

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