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[/] [amber/] [trunk/] [hw/] [tests/] - Rev 87

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Rev Log message Author Age Path
87 Added support for "When an Operand2 constant is used with the instructions MOVS, MVNS, ANDS, ORRS, ORNS, EORS, BICS, TEQ or TST, the carry flag is updated to bit[31] of the constant, if the constant is greater than 255 and can be produced by shifting an 8-bit value" to amber23 csantifort 3396d 21h /amber/trunk/hw/tests/
86 Fixed bug in amber 25 where a read was taken from user mode register in subervisor mode immediately following a ldm to user mode registers csantifort 3409d 18h /amber/trunk/hw/tests/
83 Fixed bug with carry bit - now only use the carry bit as an input to specific instruments that use it - add with carry and subtract with carry csantifort 3410d 01h /amber/trunk/hw/tests/
82 Fixed overflag bug, ldmia user regs bug and status_bits_mode set on non-ececuting command bug csantifort 3423d 13h /amber/trunk/hw/tests/
70 The mlas_bug testcase tried to use stack without setting stack pointer
register, causing unpredictable behavoiur.
The patch uses an expilict stack area for the test.
Contributed by: Dmitry Tarnyagin <dmitry.tarnyagin@lockless.no>
csantifort 4109d 20h /amber/trunk/hw/tests/
60 Bug fix; removed a combinational loop from the a25_decode logic. csantifort 4614d 16h /amber/trunk/hw/tests/
56 Remove the timeouts file from svn. Its an output file and gets now just gets created automatically
when sims are run for the first time.
csantifort 4684d 17h /amber/trunk/hw/tests/
54 Bug fix for bug reported by Botao Lee. The mode bits in the decode stage did not change immediately
after a mode switch from a teqp instruction, but 1 cycle later. This meant the wrong set of registers
was selected for writing to for 1 clock cycle.
csantifort 4701d 17h /amber/trunk/hw/tests/
50 Revert to previous version csantifort 4757d 15h /amber/trunk/hw/tests/
49 Added a note n how to change timeouts csantifort 4757d 15h /amber/trunk/hw/tests/
48 Fixed a bug in linux that caused the os to not return to the running application after an interrupt.
Hello-world now runs stand-alone again.
Added initrd-200k-dhry, a disk image that uses the dhry program for init.
csantifort 4761d 21h /amber/trunk/hw/tests/
40 Added wishbone bus jitter testing option.
Cleaned up waveform log .do files, now seperate files for a23 and a25 cores.
Added vmlinux executable elf file for running on hardware.
csantifort 4813d 14h /amber/trunk/hw/tests/
36 Changed boot_mem for the a25 system to be 128 bits wide to match the 128-bit wide wishbone bus csantifort 4816d 14h /amber/trunk/hw/tests/
35 Amber25 improvements:
Use 128-bit wishbone bus, instead of 32-bit to reduce cache miss fetch times
Use a fast barrel shifter for shifts between 0 and 4 to improve timing
Use a 2 cycle full barrel shifter for complex shifts
csantifort 4817d 21h /amber/trunk/hw/tests/
20 Added feature to A25 core to directly use a read value from the write back stage
to reduce the stall to 1 cycle when there is a register conflict with the
following instruction. This increases performance by about 3%.
csantifort 4902d 21h /amber/trunk/hw/tests/
17 amber25 core bug fix. The return address for irq interrupts was off by 4 bytes
when the interrupt occurred during a stm instruction with the following instruction
having some register conflicts. Added test irq_stm to catch the bug.
Cleaned up some header descriptions
csantifort 4906d 19h /amber/trunk/hw/tests/
15 Copied amber to amber23, Many system changes to support new amber25 core. csantifort 4909d 09h /amber/trunk/hw/tests/
11 Added vmlinux test. csantifort 4925d 21h /amber/trunk/hw/tests/
6 Set ignore property for output files csantifort 4938d 19h /amber/trunk/hw/tests/
2 Baseline release of the Amber 2 core csantifort 4939d 19h /amber/trunk/hw/tests/

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