URL https://opencores.org/ocsvn/apbi2c/apbi2c/trunk

Subversion Repositories apbi2c

[/] [apbi2c/] - Rev 24

Rev	Log message	Author	Age	Path
24	Correcetd modules and back again toold plan on fifo using only registers.	redbear	3697d 22h	/apbi2c/
23	correcting TX FSM	redbear	3712d 04h	/apbi2c/
22	Correcting TX transmission and remove tri state from RTL.	redbear	3712d 23h	/apbi2c/
21	added tri state on module i2c	redbear	3726d 02h	/apbi2c/
20	Finished a previous version from RX and added SDA and SCL enable to PADS.	redbear	3726d 21h	/apbi2c/
19	changes about area use for proprely use.	redbear	3771d 21h	/apbi2c/
18	Corrected fifo mem acess, i2c_module and revised conections on top	redbear	3788d 21h	/apbi2c/
17	fifo.v and dual_port_ram.v	celaya.dario	3789d 21h	/apbi2c/
16	fifo.v and dual_port_ram.v	celaya.dario	3789d 21h	/apbi2c/
15	11'd1 to 4'd1	redbear	3796d 03h	/apbi2c/
14	added a and to make real full fifo.	redbear	3796d 04h	/apbi2c/
13	re write all fifo module to write and give full when the same is not full	redbear	3796d 04h	/apbi2c/
12	added PSELx on WR_ENA, RD_ENA to correct read/write when PSEL is HIGH	redbear	3796d 04h	/apbi2c/
11	Added configuration to define RX and TX operation and configure propely the ports.	redbear	3803d 00h	/apbi2c/
10	Correcting a few words wrote wrong.	redbear	3803d 00h	/apbi2c/
9	More description added on spec	redbear	3804d 02h	/apbi2c/
8	More description added on spec	redbear	3804d 02h	/apbi2c/
7	Corrected CLOCK generated by SCL according NXP spec.	redbear	3805d 02h	/apbi2c/
6	Adding a basic FSM to RX.	redbear	3810d 03h	/apbi2c/
5	Added about APB address necessary to read and write on FIFOS and register configuration.	redbear	3818d 00h	/apbi2c/