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URL https://opencores.org/ocsvn/apbi2c/apbi2c/trunk

Subversion Repositories apbi2c

[/] [apbi2c/] [trunk/] - Rev 25

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Rev Log message Author Age Path
25 removing unnecessary file. redbear 3825d 18h /apbi2c/trunk/
24 Correcetd modules and back again toold plan on fifo using only registers. redbear 3825d 18h /apbi2c/trunk/
23 correcting TX FSM redbear 3840d 00h /apbi2c/trunk/
22 Correcting TX transmission and remove tri state from RTL. redbear 3840d 18h /apbi2c/trunk/
21 added tri state on module i2c redbear 3853d 22h /apbi2c/trunk/
20 Finished a previous version from RX and added SDA and SCL enable to PADS. redbear 3854d 17h /apbi2c/trunk/
19 changes about area use for proprely use. redbear 3899d 16h /apbi2c/trunk/
18 Corrected fifo mem acess, i2c_module and revised conections on top redbear 3916d 17h /apbi2c/trunk/
17 fifo.v and dual_port_ram.v celaya.dario 3917d 17h /apbi2c/trunk/
16 fifo.v and dual_port_ram.v celaya.dario 3917d 17h /apbi2c/trunk/
15 11'd1 to 4'd1 redbear 3923d 23h /apbi2c/trunk/
14 added a and to make real full fifo. redbear 3923d 23h /apbi2c/trunk/
13 re write all fifo module to write and give full when the same is not full redbear 3923d 23h /apbi2c/trunk/
12 added PSELx on WR_ENA, RD_ENA to correct read/write when PSEL is HIGH redbear 3923d 23h /apbi2c/trunk/
11 Added configuration to define RX and TX operation and configure propely the ports. redbear 3930d 19h /apbi2c/trunk/
10 Correcting a few words wrote wrong. redbear 3930d 20h /apbi2c/trunk/
9 More description added on spec redbear 3931d 21h /apbi2c/trunk/
8 More description added on spec redbear 3931d 21h /apbi2c/trunk/
7 Corrected CLOCK generated by SCL according NXP spec. redbear 3932d 22h /apbi2c/trunk/
6 Adding a basic FSM to RX. redbear 3937d 22h /apbi2c/trunk/

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