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[/] [apbi2c/] [trunk/] [rtl/] - Rev 24

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Rev Log message Author Age Path
24 Correcetd modules and back again toold plan on fifo using only registers. redbear 3720d 22h /apbi2c/trunk/rtl/
23 correcting TX FSM redbear 3735d 04h /apbi2c/trunk/rtl/
22 Correcting TX transmission and remove tri state from RTL. redbear 3735d 23h /apbi2c/trunk/rtl/
21 added tri state on module i2c redbear 3749d 02h /apbi2c/trunk/rtl/
20 Finished a previous version from RX and added SDA and SCL enable to PADS. redbear 3749d 21h /apbi2c/trunk/rtl/
19 changes about area use for proprely use. redbear 3794d 21h /apbi2c/trunk/rtl/
18 Corrected fifo mem acess, i2c_module and revised conections on top redbear 3811d 21h /apbi2c/trunk/rtl/
17 fifo.v and dual_port_ram.v celaya.dario 3812d 21h /apbi2c/trunk/rtl/
16 fifo.v and dual_port_ram.v celaya.dario 3812d 21h /apbi2c/trunk/rtl/
15 11'd1 to 4'd1 redbear 3819d 03h /apbi2c/trunk/rtl/
14 added a and to make real full fifo. redbear 3819d 04h /apbi2c/trunk/rtl/
13 re write all fifo module to write and give full when the same is not full redbear 3819d 04h /apbi2c/trunk/rtl/
12 added PSELx on WR_ENA, RD_ENA to correct read/write when PSEL is HIGH redbear 3819d 04h /apbi2c/trunk/rtl/
11 Added configuration to define RX and TX operation and configure propely the ports. redbear 3826d 00h /apbi2c/trunk/rtl/
7 Corrected CLOCK generated by SCL according NXP spec. redbear 3828d 02h /apbi2c/trunk/rtl/
6 Adding a basic FSM to RX. redbear 3833d 03h /apbi2c/trunk/rtl/
4 Added on module I2C basic error for register configuration redbear 3841d 02h /apbi2c/trunk/rtl/
2 Adding files and initial version. redbear 3841d 22h /apbi2c/trunk/rtl/

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