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URL https://opencores.org/ocsvn/async_sdm_noc/async_sdm_noc/trunk

Subversion Repositories async_sdm_noc

[/] [async_sdm_noc/] - Rev 17

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Rev Log message Author Age Path
17 allocators wsong0210 4780d 12h /async_sdm_noc/
16 input buffers wsong0210 4780d 13h /async_sdm_noc/
15 update license wsong0210 4781d 08h /async_sdm_noc/
14 output buffers wsong0210 4781d 11h /async_sdm_noc/
13 router structure configuration wsong0210 4781d 12h /async_sdm_noc/
12 crossbars wsong0210 4781d 12h /async_sdm_noc/
11 arbiters wsong0210 4781d 14h /async_sdm_noc/
10 script for async cell lib disable timing arc wsong0210 4783d 15h /async_sdm_noc/
9 cell library setting up script wsong0210 4784d 05h /async_sdm_noc/
8 update the async cell lib wsong0210 4784d 06h /async_sdm_noc/
7 add the verilog Nangate simulation file wsong0210 4784d 06h /async_sdm_noc/
6 the asynchronous cell library wsong0210 4784d 07h /async_sdm_noc/
5 modify the file dir for multiple designs wsong0210 4784d 07h /async_sdm_noc/
4 update license and cell lib wsong0210 4784d 12h /async_sdm_noc/
3 directories wsong0210 4795d 05h /async_sdm_noc/
2 initial author list wsong0210 4795d 05h /async_sdm_noc/
1 The project and the structure was created root 4795d 12h /async_sdm_noc/

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