URL https://opencores.org/ocsvn/async_sdm_noc/async_sdm_noc/trunk

Subversion Repositories async_sdm_noc

[/] [async_sdm_noc/] - Rev 79

Rev	Log message	Author	Age	Path
79	update comments in sim compile.sh to clarify that synthesis must be done before post-synthesis simulation	wsong0210	4550d 06h	/async_sdm_noc/
78	pass link	wsong0210	4716d 18h	/async_sdm_noc/
77	pass syn elaboration	wsong0210	4717d 18h	/async_sdm_noc/
76	fix syntex	wsong0210	4721d 18h	/async_sdm_noc/
75	code finished, start the debugging	wsong0210	4721d 18h	/async_sdm_noc/
74	in/out buffer finished	wsong0210	4722d 18h	/async_sdm_noc/
73	input buffer	wsong0210	4729d 17h	/async_sdm_noc/
72	clos-opt ongoing, Clos switch finished, nxt input buffer	wsong0210	4730d 18h	/async_sdm_noc/
71	the buffered 2-stage Clos switch	wsong0210	4731d 18h	/async_sdm_noc/
70	clos-opt ongoing	wsong0210	4731d 18h	/async_sdm_noc/
69	central module of the Clos	wsong0210	4734d 18h	/async_sdm_noc/
68	rewite the clos switch in the SDM-Clos-buf router	wsong0210	4735d 18h	/async_sdm_noc/
67	structure not good, prepare to use new files	wsong0210	4735d 19h	/async_sdm_noc/
66	clos opt ongoing	wsong0210	4750d 12h	/async_sdm_noc/
65	pipeline controller	wsong0210	4750d 13h	/async_sdm_noc/
64	clos opt ongoing	wsong0210	4750d 13h	/async_sdm_noc/
63	clos opt ongoing	wsong0210	4750d 17h	/async_sdm_noc/
62	clos opt ongoing	wsong0210	4751d 18h	/async_sdm_noc/
61	settle down the pipeline controller	wsong0210	4756d 17h	/async_sdm_noc/
60	try to make the address comparison relaxed QDI	wsong0210	4759d 18h	/async_sdm_noc/