URL https://opencores.org/ocsvn/async_sdm_noc/async_sdm_noc/trunk

Subversion Repositories async_sdm_noc

[/] [async_sdm_noc/] [branches/] - Rev 22

Rev	Log message	Author	Age	Path
22	roll back	wsong0210	4750d 19h	/async_sdm_noc/branches/
21	prepare trunk	wsong0210	4750d 19h	/async_sdm_noc/branches/
20	prepare trunk	wsong0210	4750d 19h	/async_sdm_noc/branches/
19	sdm router ready	wsong0210	4751d 00h	/async_sdm_noc/branches/
18	allocators_modify	wsong0210	4752d 00h	/async_sdm_noc/branches/
17	allocators	wsong0210	4752d 00h	/async_sdm_noc/branches/
16	input buffers	wsong0210	4752d 01h	/async_sdm_noc/branches/
15	update license	wsong0210	4752d 20h	/async_sdm_noc/branches/
14	output buffers	wsong0210	4752d 23h	/async_sdm_noc/branches/
13	router structure configuration	wsong0210	4753d 00h	/async_sdm_noc/branches/
12	crossbars	wsong0210	4753d 00h	/async_sdm_noc/branches/
11	arbiters	wsong0210	4753d 01h	/async_sdm_noc/branches/
10	script for async cell lib disable timing arc	wsong0210	4755d 03h	/async_sdm_noc/branches/
9	cell library setting up script	wsong0210	4755d 17h	/async_sdm_noc/branches/
8	update the async cell lib	wsong0210	4755d 18h	/async_sdm_noc/branches/
7	add the verilog Nangate simulation file	wsong0210	4755d 18h	/async_sdm_noc/branches/
6	the asynchronous cell library	wsong0210	4755d 19h	/async_sdm_noc/branches/
5	modify the file dir for multiple designs	wsong0210	4755d 19h	/async_sdm_noc/branches/
4	update license and cell lib	wsong0210	4756d 00h	/async_sdm_noc/branches/
3	directories	wsong0210	4766d 17h	/async_sdm_noc/branches/