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[/] [async_sdm_noc/] [branches/] [clos_opt/] - Rev 75

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Rev Log message Author Age Path
75 code finished, start the debugging wsong0210 4690d 03h /async_sdm_noc/branches/clos_opt/
74 in/out buffer finished wsong0210 4691d 03h /async_sdm_noc/branches/clos_opt/
73 input buffer wsong0210 4698d 03h /async_sdm_noc/branches/clos_opt/
72 clos-opt ongoing, Clos switch finished, nxt input buffer wsong0210 4699d 03h /async_sdm_noc/branches/clos_opt/
71 the buffered 2-stage Clos switch wsong0210 4700d 03h /async_sdm_noc/branches/clos_opt/
70 clos-opt ongoing wsong0210 4700d 03h /async_sdm_noc/branches/clos_opt/
69 central module of the Clos wsong0210 4703d 03h /async_sdm_noc/branches/clos_opt/
68 rewite the clos switch in the SDM-Clos-buf router wsong0210 4704d 03h /async_sdm_noc/branches/clos_opt/
67 structure not good, prepare to use new files wsong0210 4704d 04h /async_sdm_noc/branches/clos_opt/
66 clos opt ongoing wsong0210 4718d 21h /async_sdm_noc/branches/clos_opt/
65 pipeline controller wsong0210 4718d 22h /async_sdm_noc/branches/clos_opt/
64 clos opt ongoing wsong0210 4718d 22h /async_sdm_noc/branches/clos_opt/
63 clos opt ongoing wsong0210 4719d 02h /async_sdm_noc/branches/clos_opt/
62 clos opt ongoing wsong0210 4720d 03h /async_sdm_noc/branches/clos_opt/
61 settle down the pipeline controller wsong0210 4725d 02h /async_sdm_noc/branches/clos_opt/
60 try to make the address comparison relaxed QDI wsong0210 4728d 03h /async_sdm_noc/branches/clos_opt/
59 address deduction wsong0210 4730d 02h /async_sdm_noc/branches/clos_opt/
58 opt ongoing 10/06/2011 wsong0210 4731d 03h /async_sdm_noc/branches/clos_opt/
57 insert buffers inside clos wsong0210 4731d 05h /async_sdm_noc/branches/clos_opt/
55 merge reference list wsong0210 4732d 03h /async_sdm_noc/trunk/

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