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[/] [async_sdm_noc/] [branches/] [clos_opt/] [lib/] - Rev 65

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Rev Log message Author Age Path
57 insert buffers inside clos wsong0210 4754d 22h /async_sdm_noc/branches/clos_opt/lib/
22 roll back wsong0210 4770d 14h /async_sdm_noc/trunk/lib/
7 add the verilog Nangate simulation file wsong0210 4775d 13h /async_sdm_noc/branches/lib/
4 update license and cell lib wsong0210 4775d 19h /async_sdm_noc/branches/lib/

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