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[/] [ata/] [trunk/] [rtl/] [verilog/] - Rev 18

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Rev Log message Author Age Path
18 Changed dd_padoen_o portname into dd_pad_oe_o, because it is active high. rherveille 8307d 01h /ata/trunk/rtl/verilog/
17 Changed top-level. Made asynchronous reset programmable. rherveille 8312d 22h /ata/trunk/rtl/verilog/
16 - Added Test Bench
- Added Synthesis scripts for Design Compiler
- Fixed minor bug in atahost_top
rudi 8339d 20h /ata/trunk/rtl/verilog/
15 Changed filenames and top-level port names to be conform new OpenCores conventions rherveille 8340d 19h /ata/trunk/rtl/verilog/
14 created new directory structure rherveille 8352d 20h /ata/trunk/rtl/verilog/

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