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[/] [can/] [tags/] [rel_10/] [rtl/] [verilog/] - Rev 28

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Rev	Log message	Author	Age	Path
28	Bosch license warning added. Error counters finished. Overload frames still need to be fixed.	mohor	7812d 13h	/can/tags/rel_10/rtl/verilog/
27	This file is not used.	mohor	7816d 22h	/can/tags/rel_10/rtl/verilog/
26	Backup.	mohor	7816d 22h	/can/tags/rel_10/rtl/verilog/
25	* empty log message *	mohor	7817d 01h	/can/tags/rel_10/rtl/verilog/
24	backup.	mohor	7821d 15h	/can/tags/rel_10/rtl/verilog/
23	Fifo corrected to be synthesizable.	mohor	7834d 22h	/can/tags/rel_10/rtl/verilog/
22	Form error supported. When receiving messages, last bit of the end-of-frame does not generate form error. Receiver goes to the idle mode one bit sooner. (CAN specification ver 2.0, part B, page 57).	mohor	7836d 02h	/can/tags/rel_10/rtl/verilog/
21	Data is stored to fifo at the end of ack stage.	mohor	7836d 18h	/can/tags/rel_10/rtl/verilog/
20	CRC checking fixed (when bitstuff occurs at the end of a CRC sequence).	mohor	7836d 19h	/can/tags/rel_10/rtl/verilog/
19	RX state machine fixed to receive "remote request" frames correctly. No data bytes are written to fifo when such frames are received.	mohor	7837d 01h	/can/tags/rel_10/rtl/verilog/
18	When a frame with "remote request" is received, no data is stored to fifo, just the frame information (identifier, ...). Data length that is stored is the received data length and not the actual data length that is stored to fifo.	mohor	7837d 03h	/can/tags/rel_10/rtl/verilog/
17	Addresses corrected to decimal values (previously hex).	mohor	7837d 22h	/can/tags/rel_10/rtl/verilog/
16	rx_fifo is now working.	mohor	7838d 04h	/can/tags/rel_10/rtl/verilog/
15	Temporary version (backup).	mohor	7841d 22h	/can/tags/rel_10/rtl/verilog/
14	rx fifo added. Not 100 % verified, yet.	mohor	7842d 18h	/can/tags/rel_10/rtl/verilog/
13	Temporary files (backup).	mohor	7843d 01h	/can/tags/rel_10/rtl/verilog/
12	Temp version.	mohor	7844d 02h	/can/tags/rel_10/rtl/verilog/
11	Acceptance filter added.	mohor	7844d 14h	/can/tags/rel_10/rtl/verilog/
10	Backup version.	mohor	7855d 12h	/can/tags/rel_10/rtl/verilog/
9	Header changed, testbench improved to send a frame (crc still missing).	mohor	7856d 16h	/can/tags/rel_10/rtl/verilog/

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[/] [can/] [tags/] [rel_10/] [rtl/] [verilog/] - Rev 28

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