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[/] [can/] [tags/] [rel_14/] [rtl/] - Rev 161

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Rev	Log message	Author	Age	Path
161	New directory structure.	root	5572d 01h	/can/tags/rel_14/rtl/
116	This commit was manufactured by cvs2svn to create tag 'rel_14'.		7606d 04h	/can/tags/rel_14/rtl/
115	Artisan ram instances added.	simons	7606d 04h	/can/tags/rel_14/rtl/
112	Tx and rx length are limited to 8 bytes regardless to the DLC value.	tadejm	7633d 05h	/can/tags/rel_14/rtl/
111	Fixed according to the linter. Case statement for data_out joined.	mohor	7635d 05h	/can/tags/rel_14/rtl/
110	Fixed according to the linter.	mohor	7635d 05h	/can/tags/rel_14/rtl/
109	Fixed according to the linter.	mohor	7635d 06h	/can/tags/rel_14/rtl/
108	Fixed according to the linter.	mohor	7635d 07h	/can/tags/rel_14/rtl/
107	Fixed according to the linter.	mohor	7635d 07h	/can/tags/rel_14/rtl/
106	Unused signal removed.	mohor	7641d 05h	/can/tags/rel_14/rtl/
104	Synchronization fixed. In some strange cases it didn't work according to the VHDL reference model.	tadejm	7641d 18h	/can/tags/rel_14/rtl/
102	Little fixes (to fix warnings).	mohor	7644d 09h	/can/tags/rel_14/rtl/
100	Synchronization changed.	mohor	7648d 11h	/can/tags/rel_14/rtl/
99	PCI_BIST replaced with CAN_BIST.	mohor	7648d 11h	/can/tags/rel_14/rtl/
97	Overrun fifo implemented with FFs, because it is not possible to create such a memory.	simons	7653d 22h	/can/tags/rel_14/rtl/
95	Virtual silicon ram instances added.	simons	7653d 23h	/can/tags/rel_14/rtl/
93	synthesis full_case parallel_case fixed.	mohor	7659d 11h	/can/tags/rel_14/rtl/
92	clkout is clk/2 after the reset.	mohor	7659d 19h	/can/tags/rel_14/rtl/
90	paralel_case and full_case compiler directives added to case statements.	mohor	7660d 08h	/can/tags/rel_14/rtl/
88	Previous change removed. When resynchronization occurs we go to seg1 stage. sync stage does not cause another start of seg1 stage.	mohor	7661d 05h	/can/tags/rel_14/rtl/

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[/] [can/] [tags/] [rel_14/] [rtl/] - Rev 161

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