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Rev Log message Author Age Path
136 Error counters changed. mohor 7479d 08h /can/tags/rel_22/
135 Header changed. mohor 7479d 08h /can/tags/rel_22/
134 Active high/low problem when Altera devices are used. Bug fixed by
Rojhalat Ibrahim.		 mohor 7587d 05h /can/tags/rel_22/
130 mbist signals updated according to newest convention markom 7593d 16h /can/tags/rel_22/
129 Error counters changed. mohor 7610d 01h /can/tags/rel_22/
127 Fixing the core to be Bosch VHDL Reference compatible. mohor 7610d 01h /can/tags/rel_22/
126 Error counters fixed to be compatible with Bosch VHDL reference model.
Small synchronization changes.		 mohor 7610d 21h /can/tags/rel_22/
125 Synchronization changed, error counters fixed. mohor 7615d 03h /can/tags/rel_22/
124 ALTERA_RAM supported. mohor 7635d 09h /can/tags/rel_22/
121 When detecting bus-free, signal bus_free_cnt_en was cleared to zero
although the last sampled bit was zero instead of one.		 mohor 7642d 15h /can/tags/rel_22/
119 Artisan RAMs added. mohor 7651d 12h /can/tags/rel_22/
118 Artisan RAM fixed (when not using BIST). mohor 7651d 12h /can/tags/rel_22/
117 Tristate signal tx_o is separated to tx_o and tx_oen_o. Both signals need
to be joined together on higher level.		 mohor 7651d 12h /can/tags/rel_22/
115 Artisan ram instances added. simons 7657d 06h /can/tags/rel_22/
112 Tx and rx length are limited to 8 bytes regardless to the DLC value. tadejm 7684d 07h /can/tags/rel_22/
111 Fixed according to the linter.
Case statement for data_out joined.		 mohor 7686d 07h /can/tags/rel_22/
110 Fixed according to the linter. mohor 7686d 07h /can/tags/rel_22/
109 Fixed according to the linter. mohor 7686d 08h /can/tags/rel_22/
108 Fixed according to the linter. mohor 7686d 08h /can/tags/rel_22/
107 Fixed according to the linter. mohor 7686d 09h /can/tags/rel_22/

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