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Rev Log message Author Age Path
119 Artisan RAMs added. mohor 7594d 06h /can/trunk/
118 Artisan RAM fixed (when not using BIST). mohor 7594d 06h /can/trunk/
117 Tristate signal tx_o is separated to tx_o and tx_oen_o. Both signals need
to be joined together on higher level.		 mohor 7594d 06h /can/trunk/
115 Artisan ram instances added. simons 7600d 00h /can/trunk/
112 Tx and rx length are limited to 8 bytes regardless to the DLC value. tadejm 7627d 01h /can/trunk/
111 Fixed according to the linter.
Case statement for data_out joined.		 mohor 7629d 01h /can/trunk/
110 Fixed according to the linter. mohor 7629d 01h /can/trunk/
109 Fixed according to the linter. mohor 7629d 02h /can/trunk/
108 Fixed according to the linter. mohor 7629d 02h /can/trunk/
107 Fixed according to the linter. mohor 7629d 03h /can/trunk/
106 Unused signal removed. mohor 7635d 00h /can/trunk/
104 Synchronization fixed. In some strange cases it didn't work according to
the VHDL reference model.		 tadejm 7635d 14h /can/trunk/
102 Little fixes (to fix warnings). mohor 7638d 05h /can/trunk/
100 Synchronization changed. mohor 7642d 06h /can/trunk/
99 PCI_BIST replaced with CAN_BIST. mohor 7642d 06h /can/trunk/
97 Overrun fifo implemented with FFs, because it is not possible to create such a memory. simons 7647d 18h /can/trunk/
95 Virtual silicon ram instances added. simons 7647d 19h /can/trunk/
93 synthesis full_case parallel_case fixed. mohor 7653d 06h /can/trunk/
92 clkout is clk/2 after the reset. mohor 7653d 14h /can/trunk/
90 paralel_case and full_case compiler directives added to case statements. mohor 7654d 04h /can/trunk/

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