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Rev Log message Author Age Path
129 Error counters changed. mohor 7655d 10h /can/trunk/
127 Fixing the core to be Bosch VHDL Reference compatible. mohor 7655d 10h /can/trunk/
126 Error counters fixed to be compatible with Bosch VHDL reference model.
Small synchronization changes.
mohor 7656d 06h /can/trunk/
125 Synchronization changed, error counters fixed. mohor 7660d 12h /can/trunk/
124 ALTERA_RAM supported. mohor 7680d 18h /can/trunk/
121 When detecting bus-free, signal bus_free_cnt_en was cleared to zero
although the last sampled bit was zero instead of one.
mohor 7688d 00h /can/trunk/
119 Artisan RAMs added. mohor 7696d 21h /can/trunk/
118 Artisan RAM fixed (when not using BIST). mohor 7696d 21h /can/trunk/
117 Tristate signal tx_o is separated to tx_o and tx_oen_o. Both signals need
to be joined together on higher level.
mohor 7696d 21h /can/trunk/
115 Artisan ram instances added. simons 7702d 15h /can/trunk/
112 Tx and rx length are limited to 8 bytes regardless to the DLC value. tadejm 7729d 15h /can/trunk/
111 Fixed according to the linter.
Case statement for data_out joined.
mohor 7731d 16h /can/trunk/
110 Fixed according to the linter. mohor 7731d 16h /can/trunk/
109 Fixed according to the linter. mohor 7731d 17h /can/trunk/
108 Fixed according to the linter. mohor 7731d 17h /can/trunk/
107 Fixed according to the linter. mohor 7731d 18h /can/trunk/
106 Unused signal removed. mohor 7737d 15h /can/trunk/
104 Synchronization fixed. In some strange cases it didn't work according to
the VHDL reference model.
tadejm 7738d 05h /can/trunk/
102 Little fixes (to fix warnings). mohor 7740d 20h /can/trunk/
100 Synchronization changed. mohor 7744d 21h /can/trunk/

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