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[/] [can/] [trunk/] - Rev 64

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Rev	Log message	Author	Age	Path
64	* empty log message *	mohor	7904d 17h	/can/trunk/
63	ALE changes on negedge of clk.	mohor	7910d 14h	/can/trunk/
62	can_cs signal used for generation of the cs.	mohor	7910d 14h	/can/trunk/
61	Bidirectional port_0_i changed to port_0_io. input cs_can changed to cs_can_i.	mohor	7913d 04h	/can/trunk/
60	rd_i and wr_i are active high signals. If 8051 is connected, these two signals need to be negated one level higher.	mohor	7913d 05h	/can/trunk/
59	8051 interface added (besides WISHBONE interface). Selection is made in can_defines.v file.	mohor	7913d 06h	/can/trunk/
58	timescale.v is used for simulation only.	mohor	7913d 17h	/can/trunk/
57	Mux used for clkout to avoid "gated clocks warning".	mohor	7913d 17h	/can/trunk/
56	Doubled declarations removed.	mohor	7914d 16h	/can/trunk/
55	wire declaration added.	mohor	7914d 17h	/can/trunk/
53	CAN pins located.	mohor	7919d 18h	/can/trunk/
52	tx_o is now tristated signal. tx_oen and tx_o combined together.	mohor	7919d 18h	/can/trunk/
51	Xilinx RAM added.	mohor	7919d 19h	/can/trunk/
50	Top level signal names changed.	mohor	7919d 19h	/can/trunk/
49	Actel APA ram changed. Now synchronous read is used.	mohor	7923d 11h	/can/trunk/
48	Actel APA ram supported.	mohor	7923d 11h	/can/trunk/
47	Data is latched on read.	mohor	7923d 11h	/can/trunk/
45	When a dominant bit was detected at the third bit of the intermission and node had a message to transmit, bit_stuff error could occur. Fixed.	mohor	7933d 10h	/can/trunk/
44	When bit error occured while active error flag was transmitted, counter was not incremented.	mohor	7933d 11h	/can/trunk/
43	Directory keeper.	mohor	7933d 17h	/can/trunk/

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[/] [can/] [trunk/] - Rev 64

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