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[/] [can/] [trunk/] [rtl/] - Rev 104

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Rev	Log message	Author	Age	Path
104	Synchronization fixed. In some strange cases it didn't work according to the VHDL reference model.	tadejm	7769d 22h	/can/trunk/rtl/
102	Little fixes (to fix warnings).	mohor	7772d 13h	/can/trunk/rtl/
100	Synchronization changed.	mohor	7776d 14h	/can/trunk/rtl/
99	PCI_BIST replaced with CAN_BIST.	mohor	7776d 15h	/can/trunk/rtl/
97	Overrun fifo implemented with FFs, because it is not possible to create such a memory.	simons	7782d 02h	/can/trunk/rtl/
95	Virtual silicon ram instances added.	simons	7782d 03h	/can/trunk/rtl/
93	synthesis full_case parallel_case fixed.	mohor	7787d 14h	/can/trunk/rtl/
92	clkout is clk/2 after the reset.	mohor	7787d 22h	/can/trunk/rtl/
90	paralel_case and full_case compiler directives added to case statements.	mohor	7788d 12h	/can/trunk/rtl/
88	Previous change removed. When resynchronization occurs we go to seg1 stage. sync stage does not cause another start of seg1 stage.	mohor	7789d 09h	/can/trunk/rtl/
87	When hard_sync or resync occure we need to go to seg1 segment. Going to sync segment is in that case blocked.	mohor	7789d 10h	/can/trunk/rtl/
85	Typo fixed.	mohor	7791d 01h	/can/trunk/rtl/
84	clk_cnt reduced from [8:0] to [6:0].	mohor	7792d 08h	/can/trunk/rtl/
82	Removed few signals.	mohor	7792d 09h	/can/trunk/rtl/
81	"chip select" signal cs_can_i is used only when not using WISHBONE interface.	mohor	7792d 10h	/can/trunk/rtl/
80	Form error was detected when stuff bit occured at the end of crc.	mohor	7792d 10h	/can/trunk/rtl/
79	Bit stuffing corrected when stuffing comes at the end of the crc.	tadejm	7793d 09h	/can/trunk/rtl/
78	tx_point generated one clk earlier. rx_i registered. Data corrected when using extended mode.	mohor	7793d 10h	/can/trunk/rtl/
77	Synchronization is also needed when transmitting a message.	mohor	7796d 09h	/can/trunk/rtl/
76	Counters width changed.	mohor	7796d 09h	/can/trunk/rtl/

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[/] [can/] [trunk/] [rtl/] - Rev 104

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