OpenCores
URL https://opencores.org/ocsvn/can/can/trunk

Subversion Repositories can

[/] [can/] [trunk/] [rtl/] - Rev 125

Rev

Go to most recent revision

Filtering Options

Clear current filter

Rev Log message Author Age Path
125 Synchronization changed, error counters fixed. mohor 7621d 16h /can/trunk/rtl/
124 ALTERA_RAM supported. mohor 7641d 22h /can/trunk/rtl/
121 When detecting bus-free, signal bus_free_cnt_en was cleared to zero
although the last sampled bit was zero instead of one.		 mohor 7649d 04h /can/trunk/rtl/
118 Artisan RAM fixed (when not using BIST). mohor 7658d 01h /can/trunk/rtl/
117 Tristate signal tx_o is separated to tx_o and tx_oen_o. Both signals need
to be joined together on higher level.		 mohor 7658d 01h /can/trunk/rtl/
115 Artisan ram instances added. simons 7663d 19h /can/trunk/rtl/
112 Tx and rx length are limited to 8 bytes regardless to the DLC value. tadejm 7690d 20h /can/trunk/rtl/
111 Fixed according to the linter.
Case statement for data_out joined.		 mohor 7692d 20h /can/trunk/rtl/
110 Fixed according to the linter. mohor 7692d 20h /can/trunk/rtl/
109 Fixed according to the linter. mohor 7692d 21h /can/trunk/rtl/
108 Fixed according to the linter. mohor 7692d 21h /can/trunk/rtl/
107 Fixed according to the linter. mohor 7692d 22h /can/trunk/rtl/
106 Unused signal removed. mohor 7698d 20h /can/trunk/rtl/
104 Synchronization fixed. In some strange cases it didn't work according to
the VHDL reference model.		 tadejm 7699d 09h /can/trunk/rtl/
102 Little fixes (to fix warnings). mohor 7702d 00h /can/trunk/rtl/
100 Synchronization changed. mohor 7706d 02h /can/trunk/rtl/
99 PCI_BIST replaced with CAN_BIST. mohor 7706d 02h /can/trunk/rtl/
97 Overrun fifo implemented with FFs, because it is not possible to create such a memory. simons 7711d 13h /can/trunk/rtl/
95 Virtual silicon ram instances added. simons 7711d 14h /can/trunk/rtl/
93 synthesis full_case parallel_case fixed. mohor 7717d 01h /can/trunk/rtl/

1 2 Next >

Show All

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.