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[/] [can/] [trunk/] [rtl/] - Rev 65

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Rev Log message Author Age Path
65 unix. mohor 7786d 09h /can/trunk/rtl/
64 *** empty log message *** mohor 7786d 09h /can/trunk/rtl/
62 can_cs signal used for generation of the cs. mohor 7792d 06h /can/trunk/rtl/
61 Bidirectional port_0_i changed to port_0_io.
input cs_can changed to cs_can_i.		 mohor 7794d 20h /can/trunk/rtl/
60 rd_i and wr_i are active high signals. If 8051 is connected, these two signals
need to be negated one level higher.		 mohor 7794d 21h /can/trunk/rtl/
59 8051 interface added (besides WISHBONE interface). Selection is made in
can_defines.v file.		 mohor 7794d 21h /can/trunk/rtl/
58 timescale.v is used for simulation only. mohor 7795d 09h /can/trunk/rtl/
57 Mux used for clkout to avoid "gated clocks warning". mohor 7795d 09h /can/trunk/rtl/
56 Doubled declarations removed. mohor 7796d 08h /can/trunk/rtl/
55 wire declaration added. mohor 7796d 08h /can/trunk/rtl/
52 tx_o is now tristated signal. tx_oen and tx_o combined together. mohor 7801d 10h /can/trunk/rtl/
51 Xilinx RAM added. mohor 7801d 11h /can/trunk/rtl/
50 Top level signal names changed. mohor 7801d 11h /can/trunk/rtl/
48 Actel APA ram supported. mohor 7805d 03h /can/trunk/rtl/
47 Data is latched on read. mohor 7805d 03h /can/trunk/rtl/
45 When a dominant bit was detected at the third bit of the intermission and
node had a message to transmit, bit_stuff error could occur. Fixed.		 mohor 7815d 01h /can/trunk/rtl/
44 When bit error occured while active error flag was transmitted, counter was
not incremented.		 mohor 7815d 02h /can/trunk/rtl/
41 Incomplete sensitivity list fixed. mohor 7815d 11h /can/trunk/rtl/
40 Typo fixed. mohor 7815d 11h /can/trunk/rtl/
39 CAN core finished. Host interface added. Registers finished.
Synchronization to the wishbone finished.		 mohor 7815d 11h /can/trunk/rtl/

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