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[/] [can/] [trunk/] [sim/] - Rev 161

Rev	Log message	Author	Age	Path
161	New directory structure.	root	5647d 23h	/can/trunk/sim/
159	* empty log message *	igorm	6985d 06h	/trunk/sim/
141	Core improved to pass all tests with the Bosch VHDL Reference system.	igorm	7410d 02h	/trunk/sim/
127	Fixing the core to be Bosch VHDL Reference compatible.	mohor	7634d 22h	/trunk/sim/
119	Artisan RAMs added.	mohor	7676d 08h	/trunk/sim/
48	Actel APA ram supported.	mohor	7847d 19h	/trunk/sim/
35	Several registers added. Not finished, yet.	mohor	7862d 22h	/trunk/sim/
29	Overload fixed. Hard synchronization also enabled at the last bit of interframe.	mohor	7868d 00h	/trunk/sim/
28	Bosch license warning added. Error counters finished. Overload frames still need to be fixed.	mohor	7868d 16h	/trunk/sim/
25	* empty log message *	mohor	7873d 04h	/trunk/sim/
24	backup.	mohor	7877d 17h	/trunk/sim/
18	When a frame with "remote request" is received, no data is stored to fifo, just the frame information (identifier, ...). Data length that is stored is the received data length and not the actual data length that is stored to fifo.	mohor	7893d 05h	/trunk/sim/
16	rx_fifo is now working.	mohor	7894d 06h	/trunk/sim/
14	rx fifo added. Not 100 % verified, yet.	mohor	7898d 20h	/trunk/sim/
13	Temporary files (backup).	mohor	7899d 04h	/trunk/sim/
11	Acceptance filter added.	mohor	7900d 16h	/trunk/sim/
8	Testbench define file added. Clock divider register added.	mohor	7913d 02h	/trunk/sim/
5	Synchronization working.	mohor	7914d 04h	/trunk/sim/
4	Dir keeper.	mohor	7919d 02h	/trunk/sim/
2	Initial	mohor	7919d 02h	/trunk/sim/