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[/] [can/] [trunk/] [sim/] - Rev 163

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Rev Log message Author Age Path
161 New directory structure. root 5587d 10h /can/trunk/sim/
159 *** empty log message *** igorm 6924d 17h /trunk/sim/
141 Core improved to pass all tests with the Bosch VHDL Reference system. igorm 7349d 14h /trunk/sim/
127 Fixing the core to be Bosch VHDL Reference compatible. mohor 7574d 09h /trunk/sim/
119 Artisan RAMs added. mohor 7615d 20h /trunk/sim/
48 Actel APA ram supported. mohor 7787d 07h /trunk/sim/
35 Several registers added. Not finished, yet. mohor 7802d 10h /trunk/sim/
29 Overload fixed. Hard synchronization also enabled at the last bit of
interframe.
mohor 7807d 11h /trunk/sim/
28 Bosch license warning added. Error counters finished. Overload frames
still need to be fixed.
mohor 7808d 04h /trunk/sim/
25 *** empty log message *** mohor 7812d 15h /trunk/sim/
24 backup. mohor 7817d 05h /trunk/sim/
18 When a frame with "remote request" is received, no data is stored to fifo, just the frame information (identifier, ...). Data length that is stored is the received data length and not the actual data length that is stored to fifo. mohor 7832d 17h /trunk/sim/
16 rx_fifo is now working. mohor 7833d 18h /trunk/sim/
14 rx fifo added. Not 100 % verified, yet. mohor 7838d 08h /trunk/sim/
13 Temporary files (backup). mohor 7838d 15h /trunk/sim/
11 Acceptance filter added. mohor 7840d 04h /trunk/sim/
8 Testbench define file added. Clock divider register added. mohor 7852d 14h /trunk/sim/
5 Synchronization working. mohor 7853d 16h /trunk/sim/
4 Dir keeper. mohor 7858d 13h /trunk/sim/
2 Initial mohor 7858d 13h /trunk/sim/

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