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[/] [can/] [trunk/] [sim/] [rtl_sim/] [run/] - Rev 161

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Rev Log message Author Age Path
161 New directory structure. root 5629d 22h /can/trunk/sim/rtl_sim/run/
159 *** empty log message *** igorm 6967d 05h /can/trunk/sim/rtl_sim/run/
141 Core improved to pass all tests with the Bosch VHDL Reference system. igorm 7392d 02h /can/trunk/sim/rtl_sim/run/
127 Fixing the core to be Bosch VHDL Reference compatible. mohor 7616d 21h /can/trunk/sim/rtl_sim/run/
119 Artisan RAMs added. mohor 7658d 08h /can/trunk/sim/rtl_sim/run/
48 Actel APA ram supported. mohor 7829d 19h /can/trunk/sim/rtl_sim/run/
35 Several registers added. Not finished, yet. mohor 7844d 21h /can/trunk/sim/rtl_sim/run/
29 Overload fixed. Hard synchronization also enabled at the last bit of
interframe.		 mohor 7849d 23h /can/trunk/sim/rtl_sim/run/
28 Bosch license warning added. Error counters finished. Overload frames
still need to be fixed.		 mohor 7850d 15h /can/trunk/sim/rtl_sim/run/
25 *** empty log message *** mohor 7855d 03h /can/trunk/sim/rtl_sim/run/
24 backup. mohor 7859d 16h /can/trunk/sim/rtl_sim/run/
18 When a frame with "remote request" is received, no data is stored to fifo, just the frame information (identifier, ...). Data length that is stored is the received data length and not the actual data length that is stored to fifo. mohor 7875d 04h /can/trunk/sim/rtl_sim/run/
16 rx_fifo is now working. mohor 7876d 05h /can/trunk/sim/rtl_sim/run/
14 rx fifo added. Not 100 % verified, yet. mohor 7880d 20h /can/trunk/sim/rtl_sim/run/
13 Temporary files (backup). mohor 7881d 03h /can/trunk/sim/rtl_sim/run/
11 Acceptance filter added. mohor 7882d 15h /can/trunk/sim/rtl_sim/run/
8 Testbench define file added. Clock divider register added. mohor 7895d 02h /can/trunk/sim/rtl_sim/run/
5 Synchronization working. mohor 7896d 03h /can/trunk/sim/rtl_sim/run/
2 Initial mohor 7901d 01h /can/trunk/sim/rtl_sim/run/

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