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19 no message bbeaver 8285d 13h /common/tags/rel_19/
18 no message bbeaver 8286d 11h /common/tags/rel_19/
17 Fixed link to specification_template.dot lampret 8286d 19h /common/tags/rel_19/
16 Added updated opencores coding guidelines. Added ver_plan.pdf and Specification template for Word. lampret 8286d 20h /common/tags/rel_19/
15 no message bbeaver 8306d 17h /common/tags/rel_19/
14 adding beginning LPM files bbeaver 8318d 13h /common/tags/rel_19/
12 Major cleanup.
Files are now compliant to Altera & Xilinx memories.
Memories are now compatible, i.e. drop-in replacements.
Added synthesizeable generic FPGA description.
Created "generic_memories" cvs entry.
rherveille 8324d 13h /common/tags/rel_19/
11 no message bbeaver 8331d 11h /common/tags/rel_19/
10 no message bbeaver 8331d 12h /common/tags/rel_19/
9 no message bbeaver 8335d 10h /common/tags/rel_19/
8 no message bbeaver 8335d 10h /common/tags/rel_19/
7 no message bbeaver 8335d 10h /common/tags/rel_19/
6 no message bbeaver 8335d 11h /common/tags/rel_19/
5 no message bbeaver 8335d 12h /common/tags/rel_19/
4 no message bbeaver 8335d 12h /common/tags/rel_19/
2 no message bbeaver 8335d 13h /common/tags/rel_19/
1 Standard project directories initialized by cvs2svn. 8335d 13h /common/tags/rel_19/

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