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[/] [copyblaze/] [trunk/] [copyblaze/] [rtl/] - Rev 64

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Rev Log message Author Age Path
63 DEV:
- design an Sram Wishbone memory.		 ameziti 4576d 21h /copyblaze/trunk/copyblaze/rtl/
59 PRJ:
- directory reorganisation		 ameziti 4577d 23h /copyblaze/trunk/copyblaze/rtl/
57 PRJ:
- new organisation of the rtl directory.		 ameziti 4577d 23h /copyblaze/trunk/copyblaze/rtl/
39 DEV:
- BUG : pop the stack also at "return I" instruction.		 ameziti 4589d 05h /copyblaze/trunk/copyblaze/rtl/
38 PRJ:
- remove automaticly generated code from svn.		 ameziti 4589d 05h /copyblaze/trunk/copyblaze/rtl/
32 SW:
- wishbone:
- add timer code software		 ameziti 4589d 19h /copyblaze/trunk/copyblaze/rtl/
28 SW
- add asm code for the "wb_gpio_08" wishbone validation test		 ameziti 4590d 09h /copyblaze/trunk/copyblaze/rtl/
22 DEV:
- wishbone :
- change the names of significants signals
- transport the data from the external component to phase2 write.		 ameziti 4593d 02h /copyblaze/trunk/copyblaze/rtl/
21 SIM:
- test the read wishbone instruction		 ameziti 4593d 02h /copyblaze/trunk/copyblaze/rtl/
19 DEV:
- wishbone address selection		 ameziti 4593d 02h /copyblaze/trunk/copyblaze/rtl/
18 DEV:
- correct some instructions selections		 ameziti 4593d 02h /copyblaze/trunk/copyblaze/rtl/
14 DOC:
- wishbone : add some comments		 ameziti 4593d 07h /copyblaze/trunk/copyblaze/rtl/
12 DEV:
- remove "Stall" management		 ameziti 4593d 08h /copyblaze/trunk/copyblaze/rtl/
9 SW:
- results of the execution on external ports		 ameziti 4593d 09h /copyblaze/trunk/copyblaze/rtl/
8 DEV
- developpement of the WbRdSing wishbone instruction		 ameziti 4593d 09h /copyblaze/trunk/copyblaze/rtl/
6 DEV:
- remove unused Wishbone signals		 ameziti 4593d 09h /copyblaze/trunk/copyblaze/rtl/
3 DOC:
- Change licence type from gpl to lgpl-3.0		 ameziti 4595d 12h /copyblaze/trunk/copyblaze/rtl/
2 Import of the copyBlaze project. ameziti 4597d 02h /copyblaze/trunk/copyblaze/rtl/

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