URL https://opencores.org/ocsvn/copyblaze/copyblaze/trunk

Subversion Repositories copyblaze

[/] [copyblaze/] [trunk/] [copyblaze/] [sim/] [rtl_sim/] - Rev 37

Rev	Log message	Author	Age	Path
37	SIM: - validation of the wishbone timer interrupt access	ameziti	4693d 17h	/copyblaze/trunk/copyblaze/sim/rtl_sim/
34	SIM: - wisbone: - add testbench for testing wishbone timer.	ameziti	4694d 07h	/copyblaze/trunk/copyblaze/sim/rtl_sim/
33	SIM: - add path from script	ameziti	4694d 07h	/copyblaze/trunk/copyblaze/sim/rtl_sim/
29	SIM: - wishbone : - add constants value of the address of wg_gpio_08 internal registers	ameziti	4694d 20h	/copyblaze/trunk/copyblaze/sim/rtl_sim/
26		ameziti	4694d 21h	/copyblaze/trunk/copyblaze/sim/rtl_sim/
25	SIM - add ModelSim scripts for the "wb_gpio_08" wishbone validation test	ameziti	4694d 21h	/copyblaze/trunk/copyblaze/sim/rtl_sim/
24	SIM - change the names format of ModelSim scripts	ameziti	4694d 21h	/copyblaze/trunk/copyblaze/sim/rtl_sim/
23	SIM: - test the read wishbone instruction	ameziti	4694d 22h	/copyblaze/trunk/copyblaze/sim/rtl_sim/
20	SIM - change the path of wishbone components	ameziti	4697d 14h	/copyblaze/trunk/copyblaze/sim/rtl_sim/
16	DEV: - wishbone : add wishbone components	ameziti	4697d 14h	/copyblaze/trunk/copyblaze/sim/rtl_sim/
2	Import of the copyBlaze project.	ameziti	4701d 14h	/copyblaze/trunk/copyblaze/sim/rtl_sim/