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URL https://opencores.org/ocsvn/copyblaze/copyblaze/trunk

Subversion Repositories copyblaze

[/] [copyblaze/] [trunk/] [copyblaze/] [sim/] [rtl_sim/] [bin/] - Rev 64

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Rev Log message Author Age Path
64 SIM:
- wisbone:
- add testbench for testing wishbone WAIT STATES sram.		 ameziti 4573d 15h /copyblaze/trunk/copyblaze/sim/rtl_sim/bin/
62 SIM:
- wisbone:
- add testbench for testing wishbone sram.		 ameziti 4580d 15h /copyblaze/trunk/copyblaze/sim/rtl_sim/bin/
60 PRJ:
- directory reorganisation		 ameziti 4581d 16h /copyblaze/trunk/copyblaze/sim/rtl_sim/bin/
48 SIM:
- test of the Compiler (PBCC) code generated execution.		 ameziti 4591d 03h /copyblaze/trunk/copyblaze/sim/rtl_sim/bin/
42 SIM:
- test of the wb_uart_8 with copyBlaze		 ameziti 4592d 04h /copyblaze/trunk/copyblaze/sim/rtl_sim/bin/
40 SIM:
- use external script for the Path		 ameziti 4592d 22h /copyblaze/trunk/copyblaze/sim/rtl_sim/bin/
37 SIM:
- validation of the wishbone timer interrupt access		 ameziti 4592d 23h /copyblaze/trunk/copyblaze/sim/rtl_sim/bin/
34 SIM:
- wisbone:
- add testbench for testing wishbone timer.		 ameziti 4593d 13h /copyblaze/trunk/copyblaze/sim/rtl_sim/bin/
33 SIM:
- add path from script		 ameziti 4593d 13h /copyblaze/trunk/copyblaze/sim/rtl_sim/bin/
26 ameziti 4594d 03h /copyblaze/trunk/copyblaze/sim/rtl_sim/bin/
25 SIM
- add ModelSim scripts for the "wb_gpio_08" wishbone validation test		 ameziti 4594d 03h /copyblaze/trunk/copyblaze/sim/rtl_sim/bin/
24 SIM
- change the names format of ModelSim scripts		 ameziti 4594d 03h /copyblaze/trunk/copyblaze/sim/rtl_sim/bin/
20 SIM
- change the path of wishbone components		 ameziti 4596d 20h /copyblaze/trunk/copyblaze/sim/rtl_sim/bin/
2 Import of the copyBlaze project. ameziti 4600d 20h /copyblaze/trunk/copyblaze/sim/rtl_sim/bin/

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