URL https://opencores.org/ocsvn/copyblaze/copyblaze/trunk

Subversion Repositories copyblaze

[/] [copyblaze/] [trunk/] [copyblaze/] [sim/] [rtl_sim/] [src/] - Rev 57

Rev	Log message	Author	Age	Path
41	SIM: - Update the wb_uart to a 8 bit system - use ulogic	ameziti	4595d 06h	/copyblaze/trunk/copyblaze/sim/rtl_sim/src/
34	SIM: - wisbone: - add testbench for testing wishbone timer.	ameziti	4596d 15h	/copyblaze/trunk/copyblaze/sim/rtl_sim/src/
29	SIM: - wishbone : - add constants value of the address of wg_gpio_08 internal registers	ameziti	4597d 05h	/copyblaze/trunk/copyblaze/sim/rtl_sim/src/
23	SIM: - test the read wishbone instruction	ameziti	4597d 06h	/copyblaze/trunk/copyblaze/sim/rtl_sim/src/
16	DEV: - wishbone : add wishbone components	ameziti	4599d 22h	/copyblaze/trunk/copyblaze/sim/rtl_sim/src/
2	Import of the copyBlaze project.	ameziti	4603d 22h	/copyblaze/trunk/copyblaze/sim/rtl_sim/src/