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[/] [dbg_interface/] [tags/] [asyst_2/] - Rev 138

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Rev Log message Author Age Path
138 Temp version before changing dbg interface. igorm 7397d 03h /dbg_interface/tags/asyst_2/
136 Table describing chain codes added. igorm 7401d 04h /dbg_interface/tags/asyst_2/
135 'hz changed to 1'hz because Icarus complains. igorm 7404d 04h /dbg_interface/tags/asyst_2/
132 Documentation updated. Many missing things added. igorm 7405d 02h /dbg_interface/tags/asyst_2/
131 Documentation updated. Many missing things added. igorm 7405d 03h /dbg_interface/tags/asyst_2/
129 New documentation. mohor 7447d 02h /dbg_interface/tags/asyst_2/
128 Defines WISHBONE_SUPPORTED and CPU_SUPPORTED added. By default both are
turned on.		 mohor 7449d 10h /dbg_interface/tags/asyst_2/
126 run_sim.scr renamed to run_sim for VATS. mohor 7452d 09h /dbg_interface/tags/asyst_2/
124 Display for VATS added. mohor 7454d 06h /dbg_interface/tags/asyst_2/
123 All flipflops are reset. mohor 7454d 06h /dbg_interface/tags/asyst_2/
121 Port signals are all set to zero after reset. mohor 7457d 06h /dbg_interface/tags/asyst_2/
120 test stall_test added. mohor 7457d 09h /dbg_interface/tags/asyst_2/
119 cpu_stall_o activated as soon as bp occurs. mohor 7457d 10h /dbg_interface/tags/asyst_2/
117 Define name changed. mohor 7459d 06h /dbg_interface/tags/asyst_2/
116 Data latching changed when testing WB. mohor 7459d 06h /dbg_interface/tags/asyst_2/
115 More debug data added. mohor 7459d 10h /dbg_interface/tags/asyst_2/
114 CRC generation iand verification in bench changed. mohor 7459d 11h /dbg_interface/tags/asyst_2/
113 IDCODE test improved. mohor 7459d 12h /dbg_interface/tags/asyst_2/
112 dbg_tb_defines.v not used. mohor 7460d 07h /dbg_interface/tags/asyst_2/
111 Define tap_defines.v added to test bench. mohor 7460d 07h /dbg_interface/tags/asyst_2/

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