OpenCores
URL https://opencores.org/ocsvn/dbg_interface/dbg_interface/trunk

Subversion Repositories dbg_interface

[/] [dbg_interface/] [tags/] [highland_ver1/] [rtl/] [verilog/] - Rev 95

Rev

Go to most recent revision

Filtering Options

Clear current filter

Rev Log message Author Age Path
95 Temp version. mohor 7583d 08h /dbg_interface/tags/highland_ver1/rtl/verilog/
94 temp version. Resets will be changed in next version. mohor 7583d 18h /dbg_interface/tags/highland_ver1/rtl/verilog/
93 tmp version. mohor 7584d 19h /dbg_interface/tags/highland_ver1/rtl/verilog/
92 temp version. mohor 7587d 23h /dbg_interface/tags/highland_ver1/rtl/verilog/
91 tmp version. mohor 7588d 18h /dbg_interface/tags/highland_ver1/rtl/verilog/
90 tmp version. mohor 7589d 13h /dbg_interface/tags/highland_ver1/rtl/verilog/
89 temp4 version. mohor 7590d 19h /dbg_interface/tags/highland_ver1/rtl/verilog/
88 temp3 version. mohor 7591d 13h /dbg_interface/tags/highland_ver1/rtl/verilog/
87 tmp2 version. mohor 7592d 18h /dbg_interface/tags/highland_ver1/rtl/verilog/
86 Tmp version. mohor 7605d 14h /dbg_interface/tags/highland_ver1/rtl/verilog/
83 Small fix. mohor 7605d 15h /dbg_interface/tags/highland_ver1/rtl/verilog/
82 New directory structure. New version of the debug interface. mohor 7605d 16h /dbg_interface/tags/highland_ver1/rtl/verilog/
81 New directory structure. New version of the debug interface.
Files that are not needed removed.		 mohor 7605d 16h /dbg_interface/tags/highland_ver1/rtl/verilog/
77 MBIST chain connection fixed. mohor 7666d 13h /dbg_interface/tags/highland_ver1/rtl/verilog/
73 CRC logic changed. mohor 7666d 14h /dbg_interface/tags/highland_ver1/rtl/verilog/
71 Mbist support added. simons 7668d 21h /dbg_interface/tags/highland_ver1/rtl/verilog/
67 Lower two address lines must be always zero. simons 7701d 17h /dbg_interface/tags/highland_ver1/rtl/verilog/
65 WB_CNTL register added, some syncronization fixes. simons 7702d 16h /dbg_interface/tags/highland_ver1/rtl/verilog/
63 Three more chains added for cpu debug access. simons 7722d 17h /dbg_interface/tags/highland_ver1/rtl/verilog/
61 Lapsus fixed. simons 7750d 17h /dbg_interface/tags/highland_ver1/rtl/verilog/

1 2 Next >

Show All

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.