URL https://opencores.org/ocsvn/dbg_interface/dbg_interface/trunk

Subversion Repositories dbg_interface

[/] [dbg_interface/] [tags/] [rel_1/] [sim/] [rtl_sim/] [run/] - Rev 158

Rev	Log message	Author	Age	Path
158		root	5602d 02h	/dbg_interface/tags/rel_1/sim/rtl_sim/run/
48	This commit was manufactured by cvs2svn to create tag 'rel_1'.		8101d 07h	/dbg_interface/tags/rel_1/sim/rtl_sim/run/
36	Structure changed. Hooks for jtag chain added.	mohor	8161d 07h	/dbg_interface/tags/rel_1/sim/rtl_sim/run/
17	dbg_timescale.v changed to timescale.v This is done for the simulation of few different cores in a single project.	mohor	8301d 11h	/dbg_interface/tags/rel_1/sim/rtl_sim/run/
5	Trace fixed. Some registers changed, trace simplified.	mohor	8332d 08h	/dbg_interface/tags/rel_1/sim/rtl_sim/run/
2	Initial official release.	mohor	8337d 08h	/dbg_interface/tags/rel_1/sim/rtl_sim/run/