OpenCores
URL https://opencores.org/ocsvn/dbg_interface/dbg_interface/trunk

Subversion Repositories dbg_interface

[/] [dbg_interface/] [tags/] [rel_10/] [rtl/] - Rev 63

Rev

Go to most recent revision

Filtering Options

Clear current filter

Rev Log message Author Age Path
63 Three more chains added for cpu debug access. simons 7623d 09h /dbg_interface/tags/rel_10/rtl/
61 Lapsus fixed. simons 7651d 09h /dbg_interface/tags/rel_10/rtl/
59 Reset value for riscsel register set to 1. simons 7651d 09h /dbg_interface/tags/rel_10/rtl/
57 Multiple cpu support added. simons 7651d 10h /dbg_interface/tags/rel_10/rtl/
53 Trst active high. Inverted on higher layer. mohor 7918d 08h /dbg_interface/tags/rel_10/rtl/
52 Trst signal is not inverted here any more. Inverted on higher layer !!!. mohor 7918d 08h /dbg_interface/tags/rel_10/rtl/
51 WISHBONE Scan Chain is changed to reflect state of the WISHBONE access (WBInProgress bit added). Internal counter is used (counts 256 wb_clk cycles) and when counter exceeds that value, wb_cyc_o is negated. mohor 7945d 20h /dbg_interface/tags/rel_10/rtl/
47 mon_cntl_o signals that controls monitor mux added. mohor 8101d 08h /dbg_interface/tags/rel_10/rtl/
46 Asynchronous reset used instead of synchronous. mohor 8109d 14h /dbg_interface/tags/rel_10/rtl/
45 tdo_padoen_o changed to tdo_padoe_o. Signal is active high. mohor 8116d 10h /dbg_interface/tags/rel_10/rtl/
44 Signal names changed to lower case. mohor 8116d 10h /dbg_interface/tags/rel_10/rtl/
43 Intentional error removed. mohor 8121d 09h /dbg_interface/tags/rel_10/rtl/
42 A block for checking possible simulation/synthesis missmatch added. mohor 8121d 11h /dbg_interface/tags/rel_10/rtl/
41 Function changed to logic because of some synthesis warnings. mohor 8129d 08h /dbg_interface/tags/rel_10/rtl/
40 Signal tdo_padoe_o changed back to tdo_padoen_o. mohor 8143d 08h /dbg_interface/tags/rel_10/rtl/
39 tdo_padoen_o changed to tdo_padoe_o. Signal was always active high, just
not named correctly.		 mohor 8144d 09h /dbg_interface/tags/rel_10/rtl/
38 Few outputs for boundary scan chain added. mohor 8157d 08h /dbg_interface/tags/rel_10/rtl/
37 tap_top and dbg_top modules are put into two separate modules. tap_top
contains only tap state machine and related logic. dbg_top contains all
logic necessery for debugging.		 mohor 8157d 12h /dbg_interface/tags/rel_10/rtl/
36 Structure changed. Hooks for jtag chain added. mohor 8161d 07h /dbg_interface/tags/rel_10/rtl/
33 LatchedJTAG_IR used when muxing TDO instead of JTAG_IR. mohor 8191d 10h /dbg_interface/tags/rel_10/rtl/

1 2 Next >

Show All

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.