OpenCores
URL https://opencores.org/ocsvn/dbg_interface/dbg_interface/trunk

Subversion Repositories dbg_interface

[/] [dbg_interface/] [tags/] [rel_12/] - Rev 35

Rev

Go to most recent revision

Filtering Options

Clear current filter

Rev Log message Author Age Path
35 Dbg support datasheet added to cvs. mohor 8192d 12h /dbg_interface/tags/rel_12/
34 Product brief added to cvs. mohor 8193d 06h /dbg_interface/tags/rel_12/
33 LatchedJTAG_IR used when muxing TDO instead of JTAG_IR. mohor 8198d 11h /dbg_interface/tags/rel_12/
32 Stupid bug that was entered by previous update fixed. mohor 8199d 10h /dbg_interface/tags/rel_12/
31 trst synchronization is not needed and was removed. mohor 8199d 11h /dbg_interface/tags/rel_12/
30 IDCODE bug fixed, chains reused to decreas size of core. Data is shifted-in
not filled-in. Tested in hw.
mohor 8210d 15h /dbg_interface/tags/rel_12/
29 Document revised and put tp better form. mohor 8214d 04h /dbg_interface/tags/rel_12/
28 TDO and TDO Enable signal are separated into two signals. mohor 8246d 12h /dbg_interface/tags/rel_12/
27 Warnings from synthesys tools fixed. mohor 8260d 13h /dbg_interface/tags/rel_12/
26 Warnings from synthesys tools fixed. mohor 8260d 13h /dbg_interface/tags/rel_12/
25 trst signal is synchronized to wb_clk_i. mohor 8261d 10h /dbg_interface/tags/rel_12/
24 CRC changed so more thorough testing is done. mohor 8262d 11h /dbg_interface/tags/rel_12/
23 Trace disabled by default. mohor 8268d 14h /dbg_interface/tags/rel_12/
22 Register length fixed. mohor 8268d 14h /dbg_interface/tags/rel_12/
21 CRC is returned when chain selection data is transmitted. mohor 8269d 10h /dbg_interface/tags/rel_12/
20 Crc generation is different for read or write commands. Small synthesys fixes. mohor 8270d 12h /dbg_interface/tags/rel_12/
19 Wishbone data latched on wb_clk_i instead of risc_clk. mohor 8282d 13h /dbg_interface/tags/rel_12/
18 Reset signals are not combined any more. mohor 8284d 22h /dbg_interface/tags/rel_12/
17 dbg_timescale.v changed to timescale.v This is done for the simulation of
few different cores in a single project.
mohor 8308d 12h /dbg_interface/tags/rel_12/
16 bs_chain_o port added. mohor 8310d 11h /dbg_interface/tags/rel_12/

1 2 Next >

Show All

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.